Memory System With Error Detection And Retry Modes Of Operation
US-2015378817-A1 · Dec 31, 2015 · US
US8935336B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8935336-B2 |
| Application number | US-14177408-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 18, 2008 |
| Priority date | Jun 18, 2008 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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In various embodiments, data processing apparatus, software, or machine-implemented methods can optimize NFSv3 asynchronous write requests or MSRPC calls that traverse a wide area network, for example, by receiving, from a client, a first request directed to a server across a wide area network; determining whether a related second request has been received previously; when a related second request has been received previously, sending, to the client, a first reply to the second request and forwarding the first request to the server, and otherwise forwarding the first request to the server without sending any reply to the client for the first request. Sending local replies from a WAN optimizer induces the client to send continuous requests, improving throughput, but at least one client request remains unreplied to, and one server error reply is always reported to the client, facilitating correct error processing at the client.
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What is claimed is: 1. A data processing apparatus, comprising: a network interface; a processor coupled to the network interface; a non-transitory machine-readable volatile or non-volatile storage medium coupled to the processor and storing one or more sequences of instructions which, when executed by the processor, cause the processor to perform: at the data processing apparatus, configured separately from a client and a server: receiving, from the client, a first request…
Physics · mapped topic
Physics · mapped topic
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