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Camera module including an image sensor and a laterally adjacent surface mount device coupled at a lower surface of a dielectric material layer
US8934052B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8934052-B2 |
| Application number | US-93823510-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 2, 2010 |
| Priority date | Nov 2, 2010 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A low profile chip scale module and method of making of the same. The low profile chip scale module includes embedded SMD and integrated EM shielding. An adhesive layer is arranged on a substrate, e.g., chip carrier. Dies and SMDs are arranged on the adhesive layer. An etched frame and molding is attached to the substrate. Inputs/outputs (I/O) are formed and the substrate is coated with a dielectric material. Metal lines and connections among bond pads are formed and another layer of dielectric material is applied as a protective layer. The substrate is cut into various predetermined sizes and a lens is attached to form the chip scale module.
First claim
Opening claim text (preview).
What is claimed is: 1. A camera module, comprising, in a stacked arrangement: a body comprising a molding material; a device layer carried by the molding and comprising an image sensor on carried by the body at an upper surface thereof, and a surface mount device (SMD) carried by the body at the upper surface thereof and laterally adjacent and spaced apart from the image sensor; a dielectric material layer partially covering the image sensor and covering the SMD; a cond…
Assignees
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Classifications
Electricity · mapped topic
- H04N23/57Primary
Electricity · mapped topic
- H10F77/407Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8934052B2 cover?
- A low profile chip scale module and method of making of the same. The low profile chip scale module includes embedded SMD and integrated EM shielding. An adhesive layer is arranged on a substrate, e.g., chip carrier. Dies and SMDs are arranged on the adhesive layer. An etched frame and molding is attached to the substrate. Inputs/outputs (I/O) are formed and the substrate is coated with a diele…
- Who is the assignee on this patent?
- Luan Jing-En, St Microelectronics Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H04N23/57. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).