Semiconductor device and method for manufacturing semiconductor device

US8933554B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8933554-B2
Application numberUS-201213978323-A
CountryUS
Kind codeB2
Filing dateJun 11, 2012
Priority dateJul 28, 2011
Publication dateJan 13, 2015
Grant dateJan 13, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device has an insulation substrate formed with a conductive pattern; an independent terminal, which is an externally leading terminal, soldered to the conductive pattern of the insulation substrate; a case disposed over the insulation substrate such that a top surface of the independent terminal is exposed; an opening provided on a side surface of the case; a nut glove inserted from the opening so as to be below the independent terminal, and fix the independent terminal; and a first projection part formed on a side surface of the nut glove, and having tapers in a frontward direction and a rearward direction of insertion of the nut glove, respectively. The rearward taper of the first projection part is pressure contacting with a sidewall surface of the opening.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device, comprising: an insulation substrate formed with a conductive pattern; an independent terminal, which is an externally leading terminal, soldered to the conductive pattern of the insulation substrate; a case disposed over the insulation substrate such that a top surface of the independent terminal is exposed; an opening provided on a side surface of the case; a nut glove, being inserted from the opening so as to be below the in…

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What does patent US8933554B2 cover?
A semiconductor device has an insulation substrate formed with a conductive pattern; an independent terminal, which is an externally leading terminal, soldered to the conductive pattern of the insulation substrate; a case disposed over the insulation substrate such that a top surface of the independent terminal is exposed; an opening provided on a side surface of the case; a nut glove inserted …
Who is the assignee on this patent?
Kodaira Yoshihiro, Fuji Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W40/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 13 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).