III-nitride enhancement mode transistors with tunable and high gate-source voltage rating

Patent metadata

Field	Value
Publication number	US-8933461-B2
Application number	US-201313886410-A
Country	US
Kind code	B2
Filing date	May 3, 2013
Priority date	Aug 9, 2012
Publication date	Jan 13, 2015
Grant date	Jan 13, 2015

Abstract

A semiconductor device includes an enhancement mode GaN FET with a depletion mode GaN FET electrically coupled in series between a gate node of the enhancement mode GaN FET and a gate terminal of the semiconductor device. A gate node of the depletion mode GaN FET is electrically coupled to a source node of the enhancement mode GaN FET. A source node of said enhancement mode GaN FET is electrically coupled to a source terminal of the semiconductor device, a drain node of the enhancement mode GaN FET is electrically coupled to a drain terminal of said semiconductor device, and a drain node of the depletion mode GaN FET is electrically coupled to a gate terminal of the semiconductor device.

First claim

What is claimed is:

1. A semiconductor device, comprising:
an enhancement mode GaN FET; and
a depletion mode GaN FET;
in which:
a source node of said enhancement mode GaN FET is electrically coupled to a source terminal of said semiconductor device;
a drain node of said enhancement mode GaN FET is electrically coupled to a drain terminal of said semiconductor device;
a gate node of said enhancement mode GaN FET is electrically coupled to a source node of said depletion mo…

Assignees

• Texas Instruments Inc

Inventors

• Pendharkar Sameer
• Tipirneni Naveen

Classifications

• H10D64/513

  Electricity · mapped topic

• H10D64/411

  Electricity · mapped topic

• H10D62/343

  Electricity · mapped topic

• H10D84/08

  Electricity · mapped topic

• H10D84/05 Primary

  Electricity · mapped topic