Selective deposition of metal oxide
US-2024282572-A1 · Aug 22, 2024 · US
US8933449B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8933449-B2 |
| Application number | US-201314099107-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 6, 2013 |
| Priority date | Aug 30, 2005 |
| Publication date | Jan 13, 2015 |
| Grant date | Jan 13, 2015 |
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Apparatus having a dielectric containing scandium and gadolinium can provide a reliable structure with a high dielectric constant (high k). In an embodiment, a monolayer or partial monolayer sequence process, such as for example atomic layer deposition (ALD), can be used to form a dielectric containing gadolinium oxide and scandium oxide. In an embodiment, a dielectric structure can be formed by depositing gadolinium oxide by atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing scandium oxide onto the substrate using precursor chemicals, and repeating to form a thin laminate structure. A dielectric containing scandium and gadolinium may be used as gate insulator of a MOSFET, a capacitor dielectric in a DRAM, as tunnel gate insulators in flash memories, as a NROM dielectric, or as a dielectric in other electronic devices, because the high dielectric constant (high k) of the film provides the functionality of a much thinner silicon dioxide film.
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What is claimed is: 1. A memory device comprising: a substrate comprising a plurality of diffusions; a dielectric layer formed on the substrate between the plurality of diffusions, the dielectric layer comprising Gd X Sc Y O 3 formed as interleaved layers of scandium oxide and gadolinium oxide wherein a ratio of thicknesses of the interleaved layers is not equal; and a gate electrode formed on the dielectric layer. 2. The memory device of claim 1 where…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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