Multi-stage decoder
US-2015381206-A1 · Dec 31, 2015 · US
Rate matching for a wireless communications system
US8930801B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8930801-B2 |
| Application number | US-96249710-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 7, 2010 |
| Priority date | Jul 30, 2007 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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Abstract
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Apparatuses and methods are provided for generating a plurality of redundancy versions using various rate matching algorithms. In some embodiments, a rate matcher is provided that allocates systematic and parity bits to the redundancy versions in a manner that allows all, of these bits to be transmitted in at least one redundancy version. In some embodiments, the rate matcher uses a first puncturing algorithm to generate both a first redundancy version and a third redundancy version, but allocates a different proportion of the systematic bits to these redundancy versions. In these embodiments, the second redundancy version may include only bits that were not transmitted in the first redundancy version.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of receiving a message over a wireless communications network, the method comprising: receiving a first redundancy version of the message, wherein the first redundancy version includes a first subset of systematic bits and a first subset of parity bits; generating a first redundancy version puncturing sequence for the first subset of systematic bits; identifying, from the received first redundancy version of the message, the first subset of the…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8930801B2 cover?
- Apparatuses and methods are provided for generating a plurality of redundancy versions using various rate matching algorithms. In some embodiments, a rate matcher is provided that allocates systematic and parity bits to the redundancy versions in a manner that allows all, of these bits to be transmitted in at least one redundancy version. In some embodiments, the rate matcher uses a first punct…
- Who is the assignee on this patent?
- Spencer Paul S, Winstok Amir, Marvell Int Ltd
- What technology area does this patent fall under?
- Primary CPC classification H03M13/2957. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).