Integrated physical coding sublayer and forward error correction in networking applications
US-2015381312-A1 · Dec 31, 2015 · US
Systems and methods for distributed low density parity check decoding
US8930792B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8930792-B2 |
| Application number | US-201313766891-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 14, 2013 |
| Priority date | Feb 14, 2013 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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Abstract
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Systems and method relating generally to data processing, and more particularly to systems and methods for utilizing multiple data streams for data recovery from a storage device. In some cases the systems include a low density parity check data decoder circuit including at least a first data decoder engine and a second data decoder engine each electrically coupled to a common circuit. The common circuit is operable to: shift a combination of both a first sub-message from the first data decoder engine and the second sub-message from the second data decoder engine to yield an shifted output, and disaggregate the shifted output to yield a third sub-message to the first data decoder engine and a fourth sub-message to the second decoder engine.
First claim
Opening claim text (preview).
What is claimed is: 1. A data processing system, the data processing system comprising: a low density parity check data decoder circuit including at least a first data decoder engine and a second data decoder engine each electrically coupled to a common circuit, wherein the first data decoder engine is operable to perform variable node updating for a first portion of a codeword and to generate a first sub-message corresponding to the first portion, and the second data decoder engi…
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- G11B20/1833Primary
Physics · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8930792B2 cover?
- Systems and method relating generally to data processing, and more particularly to systems and methods for utilizing multiple data streams for data recovery from a storage device. In some cases the systems include a low density parity check data decoder circuit including at least a first data decoder engine and a second data decoder engine each electrically coupled to a common circuit. The comm…
- Who is the assignee on this patent?
- Lsi Corp
- What technology area does this patent fall under?
- Primary CPC classification G11B20/1833. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).