Systems And Methods With Auxiliary Control Boards Having Interface Devices
US-2024393848-A1 · Nov 28, 2024 · US
Voltage regulator with drive override
US8930741B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8930741-B2 |
| Application number | US-201113316645-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 12, 2011 |
| Priority date | Sep 28, 2006 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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Abstract
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Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When the functional block is about to require an increased level of power, the associated clock is provided to drive the at least one regulator switches overriding their normal drive signal, which has a lower frequency. Thus, the switches are driven at a higher frequency sufficiently prior to (e.g., just ahead of) the load change to reduce the amount of droop that would otherwise occur.
First claim
Opening claim text (preview).
What is claimed is: 1. An apparatus comprising: a switching voltage regulator to be switched with a drive signal derived from a voltage regulator clock signal, the voltage regulator to provide a voltage supply to a functional circuit having an associated functional clock signal having a higher frequency than that of the voltage regulator clock signal; and synchronization circuit to synchronize the functional clock signal with the voltage regulator clock signal, wherein the syn…
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Frequently asked questions
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- What does patent US8930741B2 cover?
- Techniques to enable voltage regulators to adjust for coming load changes are presented herein. In some embodiments, a functional block such as a microprocessor core having an associated clock signal is powered by at least one switching-type voltage regulator. When the functional block is about to require an increased level of power, the associated clock is provided to drive the at least one re…
- Who is the assignee on this patent?
- Dibene Ii Joseph T, Aldridge Tomm, Intel Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F1/26. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).