Memory performance when speculation control is enabled, and instruction therefor
US-2015378915-A1 · Dec 31, 2015 · US
US8930675B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8930675-B2 |
| Application number | US-201213675353-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 13, 2012 |
| Priority date | Nov 13, 2012 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address. In response to the command, the TM pulls an input value (IV). The memory address is used to read a word containing multiple result values (RVs), multiple reference values, and multiple mask values from memory. A selecting circuit within the TM uses a starting bit position and a mask size to select a portion of the IV. The portion of the IV is a lookup key value (LKV). The LKV is masked by each mask value thereby generating multiple masked values. Each masked value is compared to a reference value thereby generating multiple comparison values. A lookup table generates a selector value based upon the comparison values. A result value is selected based on the selector value. The selected result value is then communicated to the processor via the bus.
Opening claim text (preview).
What is claimed is: 1. A method comprising: (a) receiving a lookup command onto a transactional memory, wherein the lookup command includes a memory address, and wherein the transactional memory includes a lookup engine and a memory unit; (b) receiving an input value (IV); (c) using the memory address to read a word out of the memory unit, wherein the word includes a plurality of result values (RVs), a plurality of reference values, and a plurality of mask values; (d) storin…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.