Multi-threaded queuing system for pattern matching
US-9223618-B2 · Dec 29, 2015 · US
Transaction routing device and method for routing transactions in an integrated circuit
US8930601B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8930601-B2 |
| Application number | US-201213405549-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 27, 2012 |
| Priority date | Feb 27, 2012 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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Abstract
Official abstract text for this publication.
A transaction routing device (e.g. an interconnect) for routing transactions in an integrated circuit includes arbitration circuitry for performing arbitration between a plurality of candidate transactions using attribute values associated with the candidate transactions. Candidate transactions are selected for routing to a destination device in dependence on the arbitration. In a cycle in which a new candidate transaction is received, the arbitration is performed using a default attribute value as the attribute value for the new transaction. Meanwhile, the actual attribute value is stored to an attribute storage unit. In a following processing cycle, if the new candidate transaction has not yet been selected for muting, then the arbitration is performed using the actual attribute value stored in the storage unit.
First claim
Opening claim text (preview).
I claim: 1. A transaction routing device for routing transactions in an integrated circuit, each transaction having an associated attribute value defining an attribute of the transaction, said transaction routing device comprising: arbitration circuitry configured to perform arbitration between a plurality of candidate transactions using the attribute values associated with said plurality of candidate transactions; and selection circuitry configured to select, in dependence on s…
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Cross-Sectional Technologies · mapped topic
- G06F13/362Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US8930601B2 cover?
- A transaction routing device (e.g. an interconnect) for routing transactions in an integrated circuit includes arbitration circuitry for performing arbitration between a plurality of candidate transactions using attribute values associated with the candidate transactions. Candidate transactions are selected for routing to a destination device in dependence on the arbitration. In a cycle in whic…
- Who is the assignee on this patent?
- Laughton Arthur, Advanced Risc Mach Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F13/362. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).