Method and wire-line transceiver for performing serial loop back test
US-11979263-B2 · May 7, 2024 · US
US8929428B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8929428-B2 |
| Application number | US-201213663768-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 30, 2012 |
| Priority date | Oct 30, 2012 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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Embodiments are directed to feed-forward equalization. In some embodiments, a first circuit is configured to receive a signal transmitted over a channel as a differential pair, and a second circuit is configured to mirror the signal as at least a pre-cursor component comprising a first transistor of a first type of technology, a cursor component comprising a second transistor of a second type of technology, and a post-cursor component comprising a third transistor of the first type of technology.
Opening claim text (preview).
What is claimed is: 1. A feed-forward equalization system comprising: a first circuit configured to receive a signal transmitted over a channel as a differential pair; and a second circuit configured to mirror the signal as at least a pre-cursor component comprising a first transistor of a first type of technology, a cursor component comprising a second transistor of a second type of technology, and a post-cursor component comprising a third transistor of the first type of techn…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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