Solid-state imaging apparatus and method of driving the same

US8928786B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928786-B2
Application numberUS-201213611476-A
CountryUS
Kind codeB2
Filing dateSep 12, 2012
Priority dateOct 7, 2011
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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Abstract

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A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source transistor is operating in the saturation region, the gate voltage of the current source transistor that is supplied from the bias line is sampled and held. The gate voltage of the current source transistor with respect to the power source voltage is controlled to the sampled voltage, thereby suppressing variation. This suppression can, in turn, suppress occurrence of line noise and a lateral smear due to difference of drop in voltage of a power source line concerning a column circuit on each row.

First claim

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What is claimed is: 1. A solid-state imaging apparatus, comprising: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, the amplifier configured to amplify a signal from the pixel; a current source transistor arranged correspondingly to each of amplifier circuits, the current source transistor configured to supply a bias current to a corresponding one of the amplifier circuits, and the cu…

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What does patent US8928786B2 cover?
A solid-state imaging apparatus includes: a plurality of pixels arranged in a matrix; a plurality of amplifier circuits each arranged correspondingly to each of columns of the pixels, for amplifying a signal from the pixel; and a current source transistor whose source is supplied with a power source voltage and which supplies the amplifier circuit with a bias current. When the current source tr…
Who is the assignee on this patent?
Iwata Koichiro, Hiyama Hiroki, Itano Tetsuya, and 3 more
What technology area does this patent fall under?
Primary CPC classification H04N25/627. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).