D-type flip-flop and clock generating circuit
US-2015358004-A1 · Dec 10, 2015 · US
US8928385B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928385-B2 |
| Application number | US-201213687637-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 28, 2012 |
| Priority date | Dec 12, 2011 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.
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What is claimed is: 1. A method of operating a system-on-chip including at least one function block, the method comprising: decreasing an operating frequency of the at least one function block in response to a change in an operating state of the at least one function block from an active state to an idle state, the decreased operating frequency being greater than zero; increasing the operating frequency of the at least one function block in response to a change in the operating…
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