Semiconductor module

US8928154B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928154-B2
Application numberUS-201213344803-A
CountryUS
Kind codeB2
Filing dateJan 6, 2012
Priority dateNov 15, 2007
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor module may include a circuit substrate with a first die on the circuit substrate and a second die on the first die. The first die may include at least one first data input/output pad on a first peripheral portion of the first die and at least one first control/address pad on a third peripheral portion, the third peripheral portion being separate from the first peripheral portion of the first die. The second die may include at least one second data input/output pad on a second peripheral portion and at least one second control/address pad on a fourth peripheral portion. The second peripheral portion of the second die is not overlapped with the first peripheral portion of the first die in plan view. The fourth peripheral portion of the second die overlaps at least a portion of the third peripheral portion of the first die.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first die; a second die stacked on the first die; first data input/output (I/O) pads disposed on a first peripheral portion of the first die, the first data I/O pads configured to input/output data I/O signals; second data I/O pads disposed on a second peripheral portion of the second die, the second data I/O pads configured to input/output data I/O signals, first command/address (C/A) pads disposed on a third p…

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Frequently asked questions

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What does patent US8928154B2 cover?
A semiconductor module may include a circuit substrate with a first die on the circuit substrate and a second die on the first die. The first die may include at least one first data input/output pad on a first peripheral portion of the first die and at least one first control/address pad on a third peripheral portion, the third peripheral portion being separate from the first peripheral portion…
Who is the assignee on this patent?
Kang Sun-Won, Song Young-Hee, Chung Tae-Gyeong, and 3 more
What technology area does this patent fall under?
Primary CPC classification H10W70/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).