Hybrid core through holes and vias

Patent metadata

Field	Value
Publication number	US-8928151-B2
Application number	US-201314019759-A
Country	US
Kind code	B2
Filing date	Sep 6, 2013
Priority date	Dec 9, 2010
Publication date	Jan 6, 2015
Grant date	Jan 6, 2015

Abstract

A semiconductor device substrate includes a front section and back section that are laminated cores disposed on a front- and back surfaces of a first core. The first core has a cylindrical plated through hole that has been metal plated and filled with air-core material. The front- and back sections have laser-drilled tapered vias that are filled with conductive material and that are coupled to the plated through hole. The back section includes an integral inductor coil that communicates to the front section. The first core and the laminated-cores form a hybrid-core semiconductor device substrate with an integral inductor coil.

First claim

What is claimed is:

1. A semiconductor device substrate, comprising:
a first core with a front surface and a back surface;
a laminated-core substrate built on the first core front- and back surfaces, wherein the laminated-core substrate includes a front section and a back section, and wherein the back section includes an integral inductor coil;
wherein the first core includes a plated through hole (PTH) and front- and back PTH conductive pads in contact with the PTH;
wherein…

Assignees

• Intel Corp

Inventors

• Roy Mihir K
• Salama Islam
• Li Yonggang

Classifications

• H10W70/65

  Electricity · mapped topic

• H10W70/20

  Electricity · mapped topic

• H10W70/685 Primary

  Electricity · mapped topic

• H10W70/635

  Electricity · mapped topic

• H10W70/60

  Electricity · mapped topic