Semiconductor device and method of manufacturing the same

US8928147B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928147-B2
Application numberUS-201414338175-A
CountryUS
Kind codeB2
Filing dateJul 22, 2014
Priority dateApr 19, 2005
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substract, a semiconductor chip by which the flip chip was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a wiring substrate having a core substrate, a first build-up substrate which is formed over a first main surface of the core substrate, and a second build-up substrate which is formed over a second main surface opposite the first main surface of the core substate; a semiconductor chip having an obverse surface and a reverse surface opposite the obverse surface, the semiconductor chip being mounted over the first build-up…

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What does patent US8928147B2 cover?
Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substract, a semiconductor chip by which the flip chip was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener f…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/74. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).