System in package structure, electroplating module thereof and memory storage device
US-2015379389-A1 · Dec 31, 2015 · US
Semiconductor device and manufacturing method thereof
US8928131B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928131-B2 |
| Application number | US-201313961197-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 7, 2013 |
| Priority date | May 31, 2005 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first conductive layer, a layer containing conductive particles which is electrically connected to the first conductive layer through an opening portion provided in the first resin layer, and a substrate provided with a second resin layer and a second conductive layer serving as an antenna. In the semiconductor device having the above-described structure, the second conductive layer is electrically connected to the first conductive layer with the layer containing conductive particles interposed therebetween. In addition, the second resin layer is provided over the first resin layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a first substrate; a transistor including a source region and a drain region over the first substrate; an insulating layer over the transistor; a first conductive layer electrically connected to one of the source region and the drain region through a first opening portion in the insulating layer; a second conductive layer electrically connected to the other of the source region and the drain region through a second…
Assignees
Inventors
Classifications
- H10W70/699Primary
Electricity · mapped topic
- H10W44/20Primary
Electricity · mapped topic
Electricity · mapped topic
- H01L23/66Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8928131B2 cover?
- The semiconductor device of the invention includes a transistor, an insulating layer provided over the transistor, a first conductive layer (corresponding to a source wire or a drain wire) electrically connected to a source region or a drain region of the transistor through an opening portion provided in the insulating layer, a first resin layer provided over the insulating layer and the first …
- Who is the assignee on this patent?
- Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification H10W70/699. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).