Method of increasing mems enclosure pressure using outgassing material
US-2015360939-A1 · Dec 17, 2015 · US
Semiconductor package and fabrication method thereof
US8928098B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928098-B2 |
| Application number | US-201213714218-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2012 |
| Priority date | Dec 13, 2011 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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- Title
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Abstract
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A semiconductor package includes: a chip having a first portion and a second portion disposed on the first portion, wherein the second portion has at least a through hole therein for exposing a portion of the first portion, and the first portion and/or the second portion has a MEMS; and an etch stop layer formed between the first portion and the second portion and partially exposed through the through hole of the second portion. The invention allows an electronic element to be received in the through hole so as for the semiconductor package to have integrated functions of the MEMS and the electronic element. Therefore, the need to dispose the electronic element on a circuit board as in the prior art can be eliminated, thereby saving space on the circuit board.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor package, comprising: a chip having a first portion and a second portion formed on the first portion, wherein the second portion has at least a through hole therein for exposing a portion of the first portion, the first portion and/or the second portion has a MEMS (Micro-Electro-Mechanical System), the first portion of the chip has a recess in communication with the through hole, and the recess does not penetrate through the first portion; a…
Assignees
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Classifications
- B81C1/00301Primary
Operations & Transport · mapped topic
Operations & Transport · mapped topic
- B81B7/007Primary
Operations & Transport · mapped topic
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Frequently asked questions
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- What does patent US8928098B2 cover?
- A semiconductor package includes: a chip having a first portion and a second portion disposed on the first portion, wherein the second portion has at least a through hole therein for exposing a portion of the first portion, and the first portion and/or the second portion has a MEMS; and an etch stop layer formed between the first portion and the second portion and partially exposed through the …
- Who is the assignee on this patent?
- Xintec Inc, Xintec Inc
- What technology area does this patent fall under?
- Primary CPC classification B81C1/00301. Mapped technology areas include Operations & Transport.
- When was this patent published?
- Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).