Transistor contacts and methods of forming the same
US-2024395871-A1 · Nov 28, 2024 · US
US8928086B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928086-B2 |
| Application number | US-201313737089-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 9, 2013 |
| Priority date | Jan 9, 2013 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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A fin structure includes an optional doped well, a disposable single crystalline semiconductor material portion, and a top semiconductor portion formed on a substrate. A disposable gate structure straddling the fin structure is formed, and end portions of the fin structure are removed to form end cavities. Doped semiconductor material portions are formed on sides of a stack of the disposable single crystalline semiconductor material portion and a channel region including the top semiconductor portion. The disposable single crystalline semiconductor material portion may be replaced with a dielectric material portion after removal of the disposable gate structure or after formation of the stack. The gate cavity is filled with a gate dielectric and a gate electrode. The channel region is stressed by the doped semiconductor material portions, and is electrically isolated from the substrate by the dielectric material portion.
Opening claim text (preview).
What is claimed is: 1. A semiconductor structure comprising: a vertical stack of a single crystalline semiconductor material portion, a dielectric material portion, and a single crystalline channel portion; a first doped semiconductor material portion epitaxially aligned to said single crystalline semiconductor material portion and said single crystalline channel portion; a second doped semiconductor material portion epitaxially aligned to said single crystalline semiconductor…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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