Strained finFET with an electrically isolated channel

US8928086B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928086-B2
Application numberUS-201313737089-A
CountryUS
Kind codeB2
Filing dateJan 9, 2013
Priority dateJan 9, 2013
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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Abstract

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A fin structure includes an optional doped well, a disposable single crystalline semiconductor material portion, and a top semiconductor portion formed on a substrate. A disposable gate structure straddling the fin structure is formed, and end portions of the fin structure are removed to form end cavities. Doped semiconductor material portions are formed on sides of a stack of the disposable single crystalline semiconductor material portion and a channel region including the top semiconductor portion. The disposable single crystalline semiconductor material portion may be replaced with a dielectric material portion after removal of the disposable gate structure or after formation of the stack. The gate cavity is filled with a gate dielectric and a gate electrode. The channel region is stressed by the doped semiconductor material portions, and is electrically isolated from the substrate by the dielectric material portion.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor structure comprising: a vertical stack of a single crystalline semiconductor material portion, a dielectric material portion, and a single crystalline channel portion; a first doped semiconductor material portion epitaxially aligned to said single crystalline semiconductor material portion and said single crystalline channel portion; a second doped semiconductor material portion epitaxially aligned to said single crystalline semiconductor…

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What does patent US8928086B2 cover?
A fin structure includes an optional doped well, a disposable single crystalline semiconductor material portion, and a top semiconductor portion formed on a substrate. A disposable gate structure straddling the fin structure is formed, and end portions of the fin structure are removed to form end cavities. Doped semiconductor material portions are formed on sides of a stack of the disposable si…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10D30/024. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).