Field-effect transistor having back gate and method of fabricating the same

US8928080B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8928080-B2
Application numberUS-201213554066-A
CountryUS
Kind codeB2
Filing dateJul 20, 2012
Priority dateDec 6, 2011
Publication dateJan 6, 2015
Grant dateJan 6, 2015

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Abstract

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A back-bias region is disposed on a substrate. A buried insulating layer covers the substrate and the back-bias region. A body is formed on the buried insulating layer and partially overlaps the back-bias region. A drain is in contact with the body. A gate electrode covers top and lateral surfaces of the body.

First claim

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What is claimed is: 1. A semiconductor device comprising: a back-bias region on a substrate; a buried insulating layer covering the substrate and the back-bias region; a body on the buried insulating layer, the body configured to partially overlap the back-bias region; a drain in contact with the body; and a gate electrode covering top and lateral surfaces of the body, wherein the back-bias region and drain are spaced apart in a horizontal direction so that the back bias…

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What does patent US8928080B2 cover?
A back-bias region is disposed on a substrate. A buried insulating layer covers the substrate and the back-bias region. A body is formed on the buried insulating layer and partially overlaps the back-bias region. A drain is in contact with the body. A gate electrode covers top and lateral surfaces of the body.
Who is the assignee on this patent?
Sun Min-Chul, Park Byung-Gook, Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D30/62. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).