Semiconductor device and method of integrating power module with interposer and opposing substrates
US-2024304603-A1 · Sep 12, 2024 · US
US8928030B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928030-B2 |
| Application number | US-201313863374-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 15, 2013 |
| Priority date | Oct 24, 2012 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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An A-NPC circuit is configured so that the intermediate potential of two connected IGBTs is clamped by a bidirectional switch including two RB-IGBTs. Control is applied to the turn-on di/dt of the IGBTs during the reverse recovery of the RB-IGBTs. The carrier life time of an n − drift region in each RB-IGBT constituting the bidirectional switch is comparatively longer than that in a typical NPT structure device. A low life time region is also provided in the interface between the n − drift region and a p collector region, and extends between the n − drift region and the p collector region. Thus, it is possible to provide a low-loss semiconductor device, a method for manufacturing the semiconductor device and a method for controlling the semiconductor device, in which the reverse recovery loss is reduced while the reverse recovery current peak and the jump voltage peak during reverse recovery are suppressed.
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What is claimed is: 1. A semiconductor device comprising: a first semiconductor region of a first conductivity type, wherein the first semiconductor region is a substrate; a second semiconductor region of a second conductivity type which is selectively provided in a surface layer of one side of the first semiconductor region; a third semiconductor region of the first conductivity type which is selectively provided inside the second semiconductor region; a gate electrode whic…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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