System and method for video coding
US-2024314310-A1 · Sep 19, 2024 · US
US2026101056A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2026101056-A1 |
| Application number | US-202519415036-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 10, 2025 |
| Priority date | Apr 12, 2021 |
| Publication date | Apr 9, 2026 |
| Grant date | — |
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A decoder includes a processor and a memory storing a computer program which, when executed by the processor, causes the processor to perform the following operations. A bitstream is parsed to obtain a video flag. When the video flag indicates that a video satisfies a preset condition, the bitstream is parsed to obtain a last-significant-coefficient position-reverse flag and coordinate information of a last significant coefficient. When the last-significant-coefficient position-reverse flag indicates that a position of the last significant coefficient is reversed for a current block, the position of the last significant coefficient is determined by calculation with the coordinate information of the last significant coefficient. According to a preset scanning order, all coefficients before the position of the last significant coefficient are decoded to determine coefficients of the current block.
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What is claimed is: 1 . A decoder, comprising a processor and a memory storing a computer program which, when executed by the processor, causes the processor to: parse a bitstream to obtain a sequence level flag; parse the bitstream to obtain a last-significant-coefficient position-reverse flag and coordinate information of a last significant coefficient when the sequence level flag indicates that a video satisfies a preset condition, wherein the preset condition comprises at…
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