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US-2024419882-A1 · Dec 19, 2024 · US
Method of verifying placement of component on circuit board
US2026099659A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2026099659-A1 |
| Application number | US-202519342337-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 26, 2025 |
| Priority date | Oct 8, 2024 |
| Publication date | Apr 9, 2026 |
| Grant date | — |
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- Title
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Abstract
Official abstract text for this publication.
A method of verifying placement of a component on a circuit board is performed by a verification system. The verification method includes receiving layout design data and verification rules of a circuit board, which is a verification target, from an external device, extracting circuit board information and component placement information from the layout design data, and determining whether or not a component placed on the circuit board conforms to the verification rules on the basis of the circuit board information and the component placement information.
First claim
Opening claim text (preview).
What is claimed is: 1 . A method of verifying placement of a component on a circuit board, the method comprising: receiving, by a verification system for placement of a component on a circuit board, layout design data and verification rules of the circuit board, the circuit board being a verification target, from an external device; extracting, by the verification system, circuit board information and component placement information from the layout design data; and determini…
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Physics · mapped topic
Physics · mapped topic
- G06F30/398Primary
Physics · mapped topic
- G06F30/347Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US2026099659A1 cover?
- A method of verifying placement of a component on a circuit board is performed by a verification system. The verification method includes receiving layout design data and verification rules of a circuit board, which is a verification target, from an external device, extracting circuit board information and component placement information from the layout design data, and determining whether or n…
- Who is the assignee on this patent?
- Samsung Sdi Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F30/398. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Thu Apr 09 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).