Semiconductor device and vehicle

US2026090403A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2026090403-A1
Application numberUS-202519403353-A
CountryUS
Kind codeA1
Filing dateNov 28, 2025
Priority dateJun 5, 2023
Publication dateMar 26, 2026
Grant date

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a semiconductor element, a first lead, and a sealing resin. The first lead includes a die pad portion including a first lead reverse surface, and a first terminal portion. The sealing resin includes a second resin surface facing in a z direction and a third resin surface facing in an x direction. The first lead includes a metal layer. The first lead reverse surface is exposed from the second resin surface. The first terminal portion includes a first-terminal base portion and a first-terminal tip portion. The first-terminal base portion passes through the third resin surface, and is spaced apart from a first resin surface in the z direction. The first-terminal tip portion is located below the first-terminal base portion. The first-terminal tip portion includes a tip surface exposed from the metal layer, and a recessed surface covered with the metal layer.

First claim

Opening claim text (preview).

1 . A semiconductor device comprising: a semiconductor element; a first lead including a die pad portion and a first terminal portion, the die pad portion including a first lead obverse surface facing a first side in a thickness direction and having the semiconductor element mounted thereon, and a first lead reverse surface facing a second side in the thickness direction; and a sealing resin including a first resin surface facing the first side in the thickness direction, a second resin surface facing the second side in the thickness direction, and a third resin surface facing a first side in a first direction perpendicular to the thickness direction, the sealing resin covering the semiconductor element and a part of the die pad portion, wherein the first lead includes a metal layer covering a part of the first terminal portion, the first lead reverse surface is exposed from the second resin surface, the first terminal portion includes a first-terminal base portion and at least one first-terminal tip portion, the first-terminal base portion passes through the third resin surface, and is spaced apart from the first resin surface in the thickness direction, the at least one first-terminal tip portion is offset to the first side in the thickness direction relative to the first-terminal base portion, and is used for mounting, the at least one first-terminal tip portion includes a first tip surface and a recessed surface connected to the first tip surface, the first tip surface is exposed from the metal layer, and the recessed surface is covered with the metal layer. 2 . The semiconductor device according to claim 1 , wherein the first tip surface includes two exposed areas spaced apart from each other, and the recessed surface is flanked by the two exposed areas. 3 . The semiconductor device according to claim 2 , wherein the two exposed areas are spaced apart from each other in the first direction. 4 . The semiconductor device according to claim 3 , wherein the first tip surface includes a connecting area that connects the two exposed areas, and that is flush with the two exposed areas, and the connecting area is exposed from the metal layer. 5 . The semiconductor device according to claim 4 , wherein the at least one first-terminal tip portion includes a first mounting surface that faces the first side in the thickness direction, and that is connected to the first tip surface, and the recessed surface is connected to the first mounting surface. 6 . The semiconductor device according to claim 3 , wherein the first terminal portion includes at least one first-terminal intermediate portion each interposed between the first-terminal base portion and one of the at least one first-terminal tip portion. 7 . The semiconductor device according to claim 6 , wherein the two exposed areas are located outward relative to a corresponding one of the at least one first-terminal intermediate portion, as viewed in a direction from the first tip surface to the corresponding first-terminal intermediate portion. 8 . The semiconductor device according to claim 6 , further comprising a second lead including a first pad portion covered with the sealing resin, and at least one second terminal portion exposed from the sealing resin, the sealing resin includes a fourth resin surface facing a second side in the first direction, and the at least one second terminal portion passes through the fourth resin surface. 9 . The semiconductor device according to claim 8 , wherein the at least one second terminal portion includes a second-terminal base portion, a second-terminal tip portion, and a second-terminal intermediate portion. 10 . The semiconductor device according to claim 9 , wherein the first-terminal intermediate portion has a first dimension, the second-terminal intermediate portion has a second dimension, the first dimension is along a direction perpendicular to both the thickness direction and a direction in which the first-terminal intermediate portion extends as viewed in the thickness direction, the second dimension is along a direction perpendicular to both the thickness direction and a direction in which the second-terminal intermediate portion extends as viewed in the thickness direction, and the first dimension is at least 0.5 times and at most twice the second dimension. 11 . The semiconductor device according to claim 8 , wherein the at least one second terminal portion includes a plurality of second terminal portions, and the plurality of second terminal portions are connected to the first pad portion. 12 . The semiconductor device according to claim 8 , further comprising a third lead including a second pad portion covered with the sealing resin, and a third terminal portion exposed from the sealing resin, and the third terminal portion passes through the fourth resin surface. 13 . The semiconductor device according to claim 1 , wherein the at least one first-terminal tip portion includes two first-terminal tip portions, and the two first-terminal tip portions extend to opposite sides with respect to the first-terminal base portion in a second direction perpendicular to the thickness direction and the first direction. 14 . The semiconductor device according to claim 1 , wherein the first terminal portion is formed with depressions, the first-terminal base portion includes a pair of base side surfaces facing away from each other in a second direction perpendicular to the thickness direction and the first direction, and as viewed in the thickness direction, each of the depressions of the first terminal portion is recessed from one of the pair of base side surfaces or from one of a pair of extending surfaces respectively connected to the pair of base side surfaces. 15 . The semiconductor device according to claim 14 , wherein the depressions are formed in the pair of base side surfaces. 16 . The semiconductor device according to claim 15 , wherein as viewed in the thickness direction, each of the depressions is located at a side of one of the pair of base side surfaces, the side being connected to one of the pair of extending surfaces. 17 . A vehicle comprising: a drive source; a storage battery that stores power supplied to the drive source; and an on-board charger that converts power inputted from an external source, and that supplies the power to the storage battery, wherein the on-board charger includes the semiconductor device according to claim 1 .

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • by a substrate and the encapsulations · CPC title

  • Die-attach connectors and strap connectors · CPC title

  • Batteries in combination with leadframes · CPC title

Patent family

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External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2026090403A1 cover?
A semiconductor device includes a semiconductor element, a first lead, and a sealing resin. The first lead includes a die pad portion including a first lead reverse surface, and a first terminal portion. The sealing resin includes a second resin surface facing in a z direction and a third resin surface facing in an x direction. The first lead includes a metal layer. The first lead reverse surfa…
Who is the assignee on this patent?
Rohm Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W70/429. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Mar 26 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).