Silicon carbide semiconductor device

Patent metadata

Field	Value
Publication number	US-2026090011-A1
Application number	US-202519284882-A
Country	US
Kind code	A1
Filing date	Jul 30, 2025
Priority date	Sep 26, 2024
Publication date	Mar 26, 2026
Grant date	—

Abstract

The SiC semiconductor device includes: a semiconductor substrate containing SiC; an insulated gate electrode structure buried in a first trench 8 provided in the semiconductor substrate; a trench contact 12 buried in a second trench 11 provided in the semiconductor substrate; a second conductivity type base region provided in contact with a side surface of the first trench and a side surface of the second trench in the semiconductor substrate; a first conductivity type main electrode region provided in contact with the side surface of the first trench and the side surface of the second trench on an upper surface side of the base region; and a second conductivity type base contact region provided in contact with a bottom surface of the second trench, in which a region along the side surface and the bottom surface of the second trench in the semiconductor substrate contains 3H-SiC.

First claim

1 . A silicon carbide semiconductor device comprising:
a semiconductor substrate containing silicon carbide; an insulated gate electrode structure that is buried in a first trench provided in the semiconductor substrate; a trench contact that is buried in a second trench provided in the semiconductor substrate; a second conductivity type base region that is provided in contact with a side surface of the first trench and a side surface of the second trench in the semiconductor substrate; a first conductivity type main electrode region that is provided in contact with the side surface of the first trench and the side surface of the second trench on an upper surface side of the base region; and a second conductivity type base contact region that is provided in contact with a bottom surface of the second trench, wherein a region along the side surface and the bottom surface of the second trench in the semiconductor substrate contains silicon carbide having a 3C structure.

2 . The silicon carbide semiconductor device according to claim 1 , wherein
a region along the side surface of the second trench in each of the base region and the main electrode region contains silicon carbide having a 3C structure, and a region along the bottom surface of the second trench in the base contact region contains silicon carbide having a 3C structure.

3 . The silicon carbide semiconductor device according to claim 1 , wherein a cross-sectional shape of the second trench is rectangular or trapezoidal.

4 . The silicon carbide semiconductor device according to claim 2 , wherein
an impurity concentration in the region of the main electrode region is 1×10 18 cm −3 or more and 7×10 19 cm −3 or less, and an impurity concentration in the region of the base region and an impurity concentration in the region of the base contact region are 1×10 18 cm −3 or more and 2×10 20 cm −3 or less.

5 . The silicon carbide semiconductor device according to claim 1 , wherein the region along the side surface and the bottom surface of the second trench in the semiconductor substrate contains silicon carbide having a 3C structure and silicon carbide having a 4H structure.

6 . The silicon carbide semiconductor device according to claim 2 , wherein the region in each of the base region and the main electrode region and the region in the base contact region contains an inert gas element.

7 . The silicon carbide semiconductor device according to claim 1 , wherein the trench contact contains aluminum or tungsten.

8 . The silicon carbide semiconductor device according to claim 1 , wherein the silicon carbide having a 3C structure is formed through amorphization of silicon carbide having a 4H structure.

9 . The silicon carbide semiconductor device according to claim 1 , wherein an upper surface of the main electrode region contains silicon carbide having a 3C structure.

10 . The silicon carbide semiconductor device according to claim 1 , wherein
a plurality of the first trenches are provided, and the second trench is provided between two of the first trenches adjacent to each other.

Assignees

• Fuji Electric Co Ltd

Inventors

• Hoshi Yasuyuki

Classifications

• H10P30/222

  characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

• H10D64/62

  Electrodes ohmically coupled to a semiconductor · CPC title

• H10D62/8325

  Silicon carbide · CPC title

• H10D62/40

  Crystalline structures · CPC title

• H10D62/60

  Impurity distributions or concentrations · CPC title