Racetrack wire, magnetic memory device using the racetrack wire, and operation method of the magnetic memory device

Patent metadata

Field	Value
Publication number	US-2026080922-A1
Application number	US-202519020358-A
Country	US
Kind code	A1
Filing date	Jan 14, 2025
Priority date	Sep 13, 2024
Publication date	Mar 19, 2026
Grant date	—

Abstract

Provided is a magnetic memory device including a moving element, a write element configured to inject a magnetic domain into the moving element, and a read element apart from the write element in a length direction of the moving element and configured to read the magnetic domain of the moving element. The moving element includes a free layer. A pinning site providing layer faces the free layer. The pinning site providing layer includes a plurality of first regions including an antiferromagnetic material. The plurality of first regions are apart from each other in the length direction of the moving element and lower the magnetic anisotropy energy of regions of the free layer facing the plurality of first regions. A plurality of pinning sites configured to pin the magnetic domains to regions of the free layer facing the plurality of first region may be provided by the plurality of first regions.

First claim

What is claimed is:

1 . A magnetic memory device comprising:
a moving element comprising a free layer; a write element configured to generate a magnetic domain on the free layer; a moving electrode configured to supply a current to move the magnetic domain to the moving element; a read element apart from the write element in a length direction of the moving element and configured to read the magnetic domain of the free layer; and a pinning site providing layer facing the free layer, wherein the pinning site providing layer includes a plurality of first regions that comprise an antiferromagnetic material, are apart from each other in the length direction of the moving element, and are configured to reduce a magnetic anisotropy energy of regions of the free layer facing the plurality of first regions.

2 . The magnetic memory device of claim 1 , wherein the antiferromagnetic material comprises at least one of an oxide including one or more of Ni, Co, Mn, Fe, Cr, or Ru, IrMn, or PtMn.

3 . The magnetic memory device of claim 1 , wherein the antiferromagnetic material comprises at least one of 3d-electrons or 4f-electrons.

4 . The magnetic memory device of claim 1 , wherein
the pinning site providing layer comprises a plurality of second regions alternately arranged with the plurality of first regions, and the plurality of second regions comprise at least one non-antiferromagnetic material.

5 . The magnetic memory device of claim 4 , wherein the non-antiferromagnetic material comprises at least one of the paramagnetic material and the diamagnetic material.

6 . The magnetic memory device of claim 4 , wherein the non-antiferromagnetic material comprises an antiferromagnetic material having a Neel temperature less than an operating temperature of the magnetic memory device.

7 . The magnetic memory device of claim 1 , further comprising:
a spin orbit torque layer facing the free layer and configured to provide a spin orbit torque to the free layer, wherein the spin orbit torque layer is between the free layer and the pinning site providing layer.

8 . The magnetic memory device of claim 1 , further comprising:
a dielectric layer disposed on the free layer.

9 . The magnetic memory device of claim 8 , wherein the pinning site providing layer is on the dielectric layer.

10 . The magnetic memory device of claim 1 , wherein the free layer has one of a single-layer structure comprising an antiferromagnetic material, or
a synthetic antiferromagnetic (SAF) structure comprising a first free layer, a second free layer, and an SAF coupling layer disposed between the first free layer and the second free layer, wherein the first free layer and the second free layer each comprise a ferromagnetic material.

11 . The magnetic memory device of claim 1 , further comprising:
a temperature controller configured to control a temperature of the plurality of first regions.

12 . The magnetic memory device of claim 11 , wherein the temperature controller comprises a plurality of temperature controllers respectively corresponding to the plurality of first regions.

13 . A racetrack wire comprising:
a free layer configured to generate a magnetic domain; a pinning site providing layer comprising a plurality of first regions comprising an antiferromagnetic material, apart from each other in a length direction of the free layer, and configured to reduce a magnetic anisotropy energy of regions of the free layer facing the plurality of first regions; and a dielectric layer on the free layer.

14 . The racetrack wire of claim 13 , wherein
the pinning site providing layer comprises a plurality of second regions alternately arranged with the plurality of first regions, and the plurality of second regions comprise at least one of a paramagnetic material and a diamagnetic material.

15 . The racetrack wire of claim 13 , further comprising:
a spin orbit torque layer facing the free layer and configured to provide a spin orbit torque to the free layer.

16 . The racetrack wire of claim 13 , wherein the free layer has one of a single-layer structure comprising an antiferromagnetic material, or
a synthetic antiferromagnetic (SAF) structure comprising a first free layer, a second free layer, and an SAF coupling layer disposed between the first free layer and the second free layer, wherein the first free layer and the second free layer each comprise a ferromagnetic material.

17 . The racetrack wire of claim 13 , further comprising:
a temperature controller configured to control a temperature of the plurality of first regions.

18 . The racetrack wire of claim 11 , wherein the temperature controller comprises a plurality of temperature controllers respectively corresponding to the plurality of first regions.

19 . An operation method of a magnetic memory device, the operation method comprising:
providing the magnetic memory device comprising a free layer, a pinning site providing layer, and a temperature controller, wherein the pinning site providing layer includes a plurality of first regions that comprise an antiferromagnetic material, are apart from each other in a length direction of the moving element, and are configured to reduce a magnetic anisotropy energy of regions of the free layer facing the plurality of first regions, and the temperature controller is configured to control a temperature of the plurality of first regions; and driving the temperature controller to control the temperature of the plurality of first regions to be less than a blocking temperature of the antiferromagnetic material.

20 . The operation method of claim 19 , further comprising:
driving the temperature controller to control the temperature of at least some of the plurality of first regions to be same as or above the blocking temperature.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Mizusaki Soichiro
• Kim Kwangseok
• Pi Unghwan
• Park Jungsik

Classifications

• H01F10/3254

  the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ] · CPC title

• H10N50/80

  Constructional details · CPC title

• G11C19/0841

  using electric current · CPC title

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/1673

  Reading or sensing circuits or methods · CPC title