Electronic device and method for manufacturing the same

US2026053040A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2026053040-A1
Application numberUS-202519269370-A
CountryUS
Kind codeA1
Filing dateJul 15, 2025
Priority dateAug 13, 2024
Publication dateFeb 19, 2026
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electronic device includes: a first substrate; an element layer disposed on the first substrate and including an active area and a peripheral area surrounding the active area; a first bonding pad disposed on the peripheral area of the element layer; a second substrate disposed opposite to the first substrate; a second bonding pad disposed on the second substrate and including a first part and a second part surrounding the first part; and a bonding material disposed between the first part of the second bonding pad and the first bonding pad and between the second part of the second bonding pad and the first bonding pad.

First claim

Opening claim text (preview).

1 . An electronic device, comprising: a first substrate; an element layer disposed on the first substrate and comprising an active area and a peripheral area surrounding the active area; a first bonding pad disposed on the peripheral area of the element layer; a second substrate disposed opposite to the first substrate; a second bonding pad disposed on the second substrate and comprising a first part and a second part surrounding the first part; and a bonding material disposed between the first part of the second bonding pad and the first bonding pad and between the second part of the second bonding pad and the first bonding pad. 2 . The electronic device of claim 1 , wherein the bonding material has a first edge and a second edge, the first edge is adjacent to the active area, and the second edge is opposite to the first edge, wherein a distance between the first edge and the first part is less than a distance between the second edge and the second part. 3 . The electronic device of claim 1 , wherein the first bonding pad comprises a third part and a fourth part surrounding the third part, wherein the bonding material is disposed between the third part of the first bonding pad and the first part of the second bonding pad and between the fourth part of the first bonding pad and the second part of the second bonding pad. 4 . The electronic device of claim 3 , wherein the first bonding pad comprises a first connection portion respectively connecting to the third part and the fourth part. 5 . The electronic device of claim 1 , wherein the second bonding pad comprises a second connection portion respectively connecting to the first part and the second part. 6 . The electronic device of claim 1 , wherein the second substrate comprises a first region and a second region surrounding to the first region, the first region and the active area are overlapped in a top view direction of the first substrate, and a thickness of at least part of the first region of the second substrate is less than a thickness of the second region of the second substrate. 7 . The electronic device of claim 1 , wherein the active area comprises a plurality of sensing units. 8 . The electronic device of claim 1 , wherein the first bonding pad comprises a gold layer, and a thickness of the gold layer ranges from 0.4 μm to 10 μm. 9 . The electronic device of claim 1 , wherein the first bonding pad comprises a palladium layer, and a thickness of the palladium layer ranges from 0.1 m to 5 μm. 10 . The electronic device of claim 1 , wherein a thickness of the first bonding pad is 0.1 μm to 35 μm. 11 . The electronic device of claim 1 , wherein a thickness of the second bonding pad is 0.1 μm to 35 μm. 12 . A method for manufacturing an electronic device, comprising the following steps: providing a mother substrate; forming an element layer on the mother substrate, wherein the element layer comprises a plurality of active areas and a peripheral area surrounding the plurality of active areas; forming a plurality of first bonding pads on the peripheral area of the element layer; providing a plurality of second substrates; forming a plurality of second bonding pads on the plurality of second substrates, wherein each of the plurality of second bonding pads respectively comprises a first part and a second part surrounding the first part; disposing the plurality of second substrates on the element layer to make the plurality of second bonding pads and the plurality of first bonding pads overlapped, and applying a bonding material on two adjacent first bonding pads of the plurality of the first bonding pads; and heating the bonding material, wherein the bonding material melts and diffuses between the first parts of the plurality of the second bonding pads and the plurality of first bonding pads and between the second parts of the plurality of second bonding pads and the plurality of first bonding pads. 13 . The method of claim 12 , further comprising a step of: cutting the mother substrate and the element layer to form a plurality of electronic devices, wherein one of the plurality of electronic devices comprises: a first substrate formed by cutting the mother substrate; the element layer disposed on the first substrate; one of the plurality of first bonding pads disposed on the peripheral area of the element layer; one of the plurality of second substrates disposed opposite to the first substrate; one of the plurality of the second bonding pads disposed on the one of the plurality of second substrates, wherein the one of the plurality of second bonding pads comprises the first part and the second part surrounding the first part; and the bonding material disposed between the first part of the one of the plurality of second bonding pads and the one of the plurality of the first bonding pads and between the second part of the one of the plurality of the second bonding pads and the one of the plurality of the first bonding pads. 14 . The method of claim 13 , further comprising the following step: attaching a peelable glue on the one of the plurality of second substrates; disposing a circuit board on the first substrate; forming a protection film on the electronic device and the circuit board; and removing the peelable glue and the protection film on the peelable glue. 15 . The method of claim 13 , wherein bonding material has a first edge and a second edge, the first edge is adjacent to one of the plurality of active areas, and the second edge is opposite to the first edge, wherein a distance between the first edge and the first part is less than a distance between the second edge and the second part. 16 . The method of claim 13 , wherein the one of the plurality of first bonding pads comprises a third part and a fourth part surrounding the third part, wherein the bonding material is disposed between the third part of the one of the plurality of first bonding pads and the first part of the one of the plurality of the second bonding pads and between the fourth part of the one of the plurality of first bonding pads and the second part of the one of the plurality of the second bonding pads. 17 . The method of claim 16 , wherein the one of the plurality of first bonding pads comprises a first connection portion respectively connecting to the third part and the fourth part. 18 . The method of claim 13 , wherein the one of the plurality of the second bonding pads comprises a second connection portion respectively connecting to the first part and the second part. 19 . The method of claim 13 , wherein the one of the plurality of second substrates comprises a first region and a second region surrounding to the first region, the first region and one of the plurality of active areas are overlapped in a top view direction of the first substrate, and a thickness of at least part of the first region of the one of the plurality of second substrates is less than a thickness of the second region of the one of the plurality of second substrates. 20 . The method of claim 13 , wherein one of the plurality of active areas comprises a plurality of sensing units.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • Multiple bond pads having different sizes · CPC title

  • Package configurations · CPC title

  • Multiple bond pads having different shapes · CPC title

  • batch processes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2026053040A1 cover?
An electronic device includes: a first substrate; an element layer disposed on the first substrate and including an active area and a peripheral area surrounding the active area; a first bonding pad disposed on the peripheral area of the element layer; a second substrate disposed opposite to the first substrate; a second bonding pad disposed on the second substrate and including a first part an…
Who is the assignee on this patent?
Innolux Corp
What technology area does this patent fall under?
Primary CPC classification H10W72/30. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Feb 19 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).