Display device and fabrication method thereof

Patent metadata

Field	Value
Publication number	US-2026052853-A1
Application number	US-202519083975-A
Country	US
Kind code	A1
Filing date	Mar 19, 2025
Priority date	Aug 13, 2024
Publication date	Feb 19, 2026
Grant date	—

Abstract

A display device includes a substrate, a light-emitting element layer, and a circuit element layer with a first and second regions that each correspond to a switching transistor and a driving transistor. The circuit element layer includes a semiconductor layer; a first conductive layer, a first insulating layer disposed between the semiconductor layer and the first conductive layer, a second insulating layer, a second conductive layer disposed on the second insulating layer and is in contact with the semiconductor layer by penetrating the first and second insulating layers, and a hydrogen diffusion control layer disposed between the first and second insulating layer and overlapping the second region. The second active pattern comprises a first and a second portion. The hydrogen diffusion control layer covers the first portion of the second active pattern and at least a portion of the second portion does not overlap the hydrogen diffusion control layer.

First claim

What is claimed is:

1 . A display device comprising:
a substrate; a light-emitting element layer disposed on the substrate and comprising a light-emitting material; and a circuit element layer disposed between the substrate and the light-emitting element layer and having a first region that corresponds to a switching transistor and a second region that corresponds to a driving transistor, wherein the circuit element layer comprises:
a semiconductor layer disposed on the substrate and comprising a first active pattern that overlaps the first region and a second active pattern that overlaps the second region;
a first conductive layer disposed on the semiconductor layer and comprising a first gate pattern that overlaps the first region and a second gate pattern that overlaps the second region;
a first insulating layer disposed between the semiconductor layer and the first conductive layer;
a second insulating layer disposed on the first conductive layer;
a second conductive layer disposed on the second insulating layer and is in contact with the semiconductor layer by penetrating the first insulating layer and the second insulating layer,
wherein the second conductive layer comprises a first input pattern and a first output pattern that contacts the first active pattern, and a second input pattern and a second output pattern that contacts the second active pattern; and
a hydrogen diffusion control layer disposed between the first insulating layer and the second insulating layer, and overlapping the second region;

wherein the second active pattern comprises a first portion and a second portion that are spaced apart from each other, and
wherein the hydrogen diffusion control layer covers the first portion of the second active pattern and at least a portion of the second portion does not overlap the hydrogen diffusion control layer.

2 . The display device of claim 1 ,
wherein the second input pattern penetrates the hydrogen diffusion control layer to contact the first portion of the second active pattern, and wherein the second output pattern does not penetrate the hydrogen diffusion control layer to contact the second portion of the second active pattern.

3 . The display device of claim 2 ,
wherein the second conductive layer further comprises a driving voltage line that transfers a driving voltage to the circuit element layer, and wherein the driving voltage line is disposed closer to the second input pattern than to the second output pattern.

4 . The display device of claim 2 ,
wherein a light-emitting element layer further comprises an electrode layer, having a contact pattern that contacts the second conductive layer, and wherein the contact pattern is disposed closer to the second output pattern than to the second input pattern.

5 . The display device of claim 1 ,
wherein an area of the hydrogen diffusion control layer is larger than an area of the first portion of the second active pattern.

6 . The display device of claim 1 ,
wherein the hydrogen diffusion control layer further covers at least a portion of the second gate pattern.

7 . The display device of claim 1 ,
wherein the circuit element layer further comprises:
a third conductive layer disposed between the first insulating layer and the second insulating layer and comprising a third gate pattern overlapping the second gate pattern; and
a third insulating layer disposed between the first insulating layer and the second insulating layer and between the second gate pattern and the third gate pattern,
wherein the hydrogen diffusion control layer is disposed between the third insulating layer and the first insulating layer.

8 . A display device comprising:
a substrate; a light-emitting element layer disposed on the substrate and comprising a light-emitting material; and a circuit element layer disposed between the substrate and the light-emitting element layer and having a first region that corresponds to a switching transistor and a second region that corresponds to a driving transistor, wherein the circuit element layer comprises:
a semiconductor layer disposed on the substrate and comprising a first active pattern that overlaps the first region and a second active pattern that overlaps the second region;
a first conductive layer disposed on the substrate and comprising a first gate pattern that overlaps the first region and a second gate pattern that overlaps the second region;
a first insulating layer disposed between the semiconductor layer and the first conductive layer;
a second insulating layer disposed on the first conductive layer;
a second conductive layer disposed on the second insulating layer and is in contact with the semiconductor layer by penetrating the first insulating layer and the second insulating layer; and
a hydrogen diffusion control layer disposed between the first insulating layer and the second insulating layer, overlapping the second active pattern, and includes a pattern that allows the first insulating layer to contact the second insulating layer.

9 . The display device of claim 8 ,
wherein the hydrogen diffusion control layer comprises a graphene oxide layer.

10 . The display device of claim 9 ,
wherein the graphene oxide layer comprises a plurality of layers stacked between the first insulating layer and the second insulating layer.

11 . The display device of claim 8 ,
wherein the second insulating layer has a higher hydrogen content than the first insulating layer.

12 . The display device of claim 11 ,
wherein the first insulating layer comprises silicon oxide, and the second insulating layer comprises silicon nitride.

13 . The display device of claim 8 ,
wherein the second active pattern comprises a first portion and a second portion that are spaced apart from each other, and wherein the hydrogen diffusion control layer covers the first portion and the second portion.

14 . The display device of claim 13 ,
wherein the second active pattern overlaps the second gate pattern.

15 . The display device of claim 8 ,
wherein the circuit element layer further comprises:
a third conductive layer disposed on the second insulating layer and comprising a third gate pattern that overlaps the second gate pattern; and
a third insulating layer disposed on the first insulating layer and the second insulating layer and between the second gate pattern and the third gate pattern.

16 . An electronic device, comprising:
a processor; a memory having stored application programs for execution by the processor; a display device, comprising:
a display panel comprising:
a substrate;
a light-emitting element layer disposed on the substrate and comprising a light-emitting material; and
a circuit element layer disposed between the substrate and the light-emitting element layer and having a first region that corresponds to a switching transistor and a second region that corresponds to a driving transistor,
wherein the circuit element layer comprises:
a semiconductor layer disposed on the substrate and comprising a first active pattern that overlaps the first region and a second active pattern that overlaps the second region;
 a first conductive layer disposed on the semiconductor layer and comprising a first gate pattern that overlaps the first region and a second gate pattern that overlaps the second region;
 a first insulating layer disposed between the semiconductor layer and the first conductive layer;
 a second insulating layer disposed on the first conductive layer;
 a second conductive layer disposed on th

Assignees

• Samsung Display Co Ltd

Inventors

• Chu Jaehwan
• Ko Eunhye
• Kim Youngoo
• Son Kyoung Seok
• Lee Seunghun

Classifications

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• H10D30/6734

  having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs · CPC title

• H10D30/6704

  having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device · CPC title

• G09G3/3233

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• H10K71/621

  Providing a shape to conductive layers, e.g. patterning or selective deposition · CPC title