Electronic circuitry, method of driving multi-gate element, and electronic system

Patent metadata

Field	Value
Publication number	US-2026045944-A1
Application number	US-202519283590-A
Country	US
Kind code	A1
Filing date	Jul 29, 2025
Priority date	Aug 8, 2024
Publication date	Feb 12, 2026
Grant date	—

Abstract

According to one embodiment, an electronic circuitry includes a control circuit configured to control a rise timing of a first pulse signal applied to a first control gate electrode of a multi-gate element; and a comparator circuit configured to acquire a comparison result: between a voltage associated with an inter-electrode voltage between a first electrode and a second electrode of the multi-gate element; and a first voltage or a second voltage smaller than the first voltage. The control circuit is configured to, based on the comparison result, acquire transition time corresponding to a duration from when the voltage associated with the inter-electrode voltage falls below the first voltage to when the voltage associated with the inter-electrode voltage falls below the second voltage during turn-on of the multi-gate element, and adjust the rise timing of the first pulse signal so as to reduce the transition time.

First claim

1 . An electronic circuitry comprising:
a control circuit configured to control a rise timing of a first pulse signal applied to a first control gate electrode of a multi-gate element; and a comparator circuit configured to acquire a comparison result between
a voltage associated with an inter-electrode voltage between a first electrode and a second electrode of the multi-gate element and
a first voltage or a second voltage smaller than the first voltage,
wherein the control circuit is configured to, based on the comparison result,
acquire transition time corresponding to a duration from when the voltage associated with the inter-electrode voltage falls below the first voltage to when the voltage associated with the inter-electrode voltage falls below the second voltage during turn-on of the multi-gate element, and
adjust the rise timing of the first pulse signal so as to reduce the transition time.

2 . The electronic circuitry according to claim 1 ,
wherein the control circuit is configured to further control a rise timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjust the rise timing of the second pulse signal so as to reduce the transition time.

3 . The electronic circuitry according to claim 2 ,
wherein the control circuit is configured to adjust the rise timings of the first pulse signal and the second pulse signal so as to minimize the transition time.

4 . The electronic circuitry according to claim 2 ,
wherein the rise timings of the first pulse signal and the second pulse signal represent relative delay times with respect to a rise timing of a main pulse signal applied to a main gate electrode of the multi-gate element.

5 . The electronic circuitry according to claim 1 , further comprising
a voltage divider circuit configured to divide the voltage between the first electrode and the second electrode, wherein the voltage divided by the voltage divider circuit is input to the comparator circuit.

6 . The electronic circuitry according to claim 5 ,
wherein the voltage divider circuit includes two resistors, and at least one of the two resistors is a variable resistor.

7 . The electronic circuitry according to claim 5 ,
wherein the comparator circuit includes a first comparator configured to compare the divided voltage and the first voltage and to output a comparison result, and a second comparator configured to compare the divided voltage and the second voltage and to output a comparison result, and the control circuit acquires the transition time based on output of the first comparator and the second comparator.

8 . The electronic circuitry according to claim 7 ,
wherein the control circuit is configured to acquire the transition time based on the time from when the output of the first comparator changes to when the output of the second comparator changes.

9 . The electronic circuitry according to claim 5 , further comprising
an A/D converter configured to convert the divided voltage to a digital signal, wherein the comparator circuit is configured to compare the digital signal of the divided voltage and the first voltage represented in digital form or the second voltage represented in digital form and acquire the comparison result as the digital signal.

10 . The electronic circuitry according to claim 2 ,
wherein the rise timings of the first pulse signal and the second pulse signal are adjusted in a direction which reduces the transition time, in response to a predetermined amount of change in the rise timings of the first pulse signal and the second pulse signal.

11 . The electronic circuitry according to claim 10 ,
wherein adjustment of the rise timings of the first pulse signal and the second pulse signal ends when an amount of change in the transition time resulting from the predetermined amount of change in the rise timings of the first pulse signal and the second pulse signal becomes equal to or less than a predetermined value.

12 . The electronic circuitry according to claim 2 ,
wherein the rise timings of the first pulse signal and the second pulse signal are independently adjusted, respectively.

13 . The electronic circuitry according to claim 2 ,
wherein initial values of the rise timings of the first pulse signal and the second pulse signal are set at timings that minimize the transition time when the rise timings of the first pulse signal and the second pulse signal are changed at predetermined step intervals.

14 . The electronic circuitry according to claim 13 ,
wherein the initial value of the rise timing of the second pulse signal is set and then the initial value of the rise timing of the first pulse signal is set.

15 . The electronic circuitry according to claim 5 ,
wherein the comparator circuit includes a switch configured to selectively output either one of the first voltage and the second voltage according to a switch signal input from the control circuit, and a third comparator configured to compare the divided voltage and either one of the first voltage and the second voltage output from the switch and to output a comparison result, and the control circuit is configured to output the first voltage via the switch, acquires first elapsed time from a predetermined reference time to a time when output of the third comparator changes, then output the second voltage via the switch, acquire second elapsed time from the reference time to a time when the output of the third comparator changes, and acquire the transition time based on a difference between the first elapsed time and the second elapsed time.

16 . The electronic circuitry according to claim 15 ,
wherein the reference time is a rise timing of a main pulse signal applied to a main gate electrode of the multi-gate element.

17 . The electronic circuitry according to claim 15 ,
wherein the control circuit is configured to further control a rise timing of a second pulse signal applied to a second control gate electrode of the multi-gate element, and adjust the rise timing of the second pulse signal so as to reduce the second elapsed time.

18 . A method of driving a multi-gate element, comprising:
acquiring a comparison result between
a voltage associated with an inter-electrode voltage between a first electrode and a second electrode of the multi-gate element and
a first voltage or a second voltage smaller than the first voltage;
acquiring transition time corresponding to a duration from when the voltage associated with the inter-electrode voltage falls below the first voltage to when the voltage associated with the inter-electrode voltage falls below the second voltage during turn-on of the multi-gate element; and adjusting a rise timing of a first pulse signal applied to a first control gate electrode of the multi-gate element so as to reduce the transition time.

19 . An electronic system comprising:
a multi-gate element; a control circuit configured to control a rise timing of a first pulse signal applied to a first control gate electrode of the multi-gate element; and a comparator circuit configured to acquire a comparison result between
a voltage associated with an inter-electrode voltage between a first electrode and a second electrode of the multi-gate element and
a first voltage or a second voltage smaller than the first voltage,
wherein the control circuit is configured to, based on the comparison result,
acquire transition time corresponding to a duration from when the voltage associated with th

Assignees

• Toshiba Kk
• Toshiba Electronic Devices & Storage Corp

Inventors

• Yamaoka Atsushi
• Hone Thomas Martin

Classifications

• H03K2217/0081

  Power supply means, e.g. to the switch driver · CPC title

• H03K17/567 Primary

  Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT · CPC title

• H03K17/168 Primary

  in composite switches · CPC title