Amplifying apparatus

Patent metadata

Field	Value
Publication number	US-2026039267-A1
Application number	US-202519280222-A
Country	US
Kind code	A1
Filing date	Jul 25, 2025
Priority date	Aug 5, 2024
Publication date	Feb 5, 2026
Grant date	—

Abstract

An amplifying apparatus includes: clip processor circuitry configured to perform clip processing, on a basis of the power of a first signal, so as to multiply the power of the first signal by a clip correction value such that the power of the first signal falls within a specified range; gain processor circuitry configured to perform gain processing so as to multiply the power of the first signal subjected to the clip processing by a gain correction value, and further configured to input to analog converter (DAC) the signal after the gain processing; and a gain adjuster configured to restore the power of the first signal output from the DAC to the power before the gain processing and the clip processing, and further configured to input the signal to a carrier amplifier.

First claim

What is claimed is:

1 . An amplifying apparatus including a carrier amplifier and a digital-to-analog converter (DAC) outputting to the carrier amplifier, and outputting a first signal to be input after amplification thereof through the DAC and the carrier amplifier, the amplifying apparatus comprising:
clip processor circuitry configured to perform clip processing, on a basis of the power of the first signal, so as to multiply the power of the first signal by a clip correction value such that the power of the first signal falls within a specified range; gain processor circuitry configured to perform gain processing so as to multiply the power of the first signal subjected to the clip processing by a gain correction value, and further configured to input to the DAC the signal after the gain processing; and a gain adjuster configured to restore the power of the first signal output from the DAC to the power before the gain processing and the clip processing, and further configured to input the signal to the carrier amplifier.

2 . The amplifying apparatus according to claim 1 , wherein
the clip processor circuitry does not perform the clip processing when the power of the first signal is less than or equal to a first threshold.

3 . The amplifying apparatus according to claim 2 , wherein
the first threshold is determined on a basis of saturation power of the carrier amplifier.

4 . The amplifying apparatus according to claim 3 , wherein
the clip correction value is determined on a basis of the first threshold.

5 . The amplifying apparatus according to claim 3 , wherein
the clip correction value is determined on a basis of the power of the first signal.

6 . The amplifying apparatus according to claim 1 , wherein
the gain correction value is determined on a basis of full-scale power of the carrier amplifier.

7 . The amplifying apparatus according to claim 2 , wherein
the gain correction value is determined on a basis of the first threshold.

8 . The amplifying apparatus according to claim 1 , wherein
the carrier amplifier is provided in a Doherty amplifier, the Doherty amplifier further including a peak amplifier, the clip processor circuitry does not perform the clip processing on a signal that is input to the peak amplifier, and the gain processor circuitry does not perform the gain processing on the signal that is input to the peak amplifier.

9 . An amplifying apparatus including a Doherty amplifier, a first digital-to-analog converter (DAC), and a second digital-to-analog converter (DAC), and outputting an input signal after amplification of power thereof, the Doherty amplifier including a carrier amplifier, a peak amplifier, a first input on a side of the carrier amplifier and a second input on a side of the peak amplifier, the first DAC being provided in front of the first input, and the second DAC being provided in front of the second input,
the amplifying apparatus comprising: clip processor circuitry configured to perform clip processing, on a basis of power of a first signal branched off from the signal, so as to multiply the power of the first signal by a clip correction value such that the power of the first signal falls within a specified range; gain processor circuitry configured to perform gain processing so as to multiply the power of the first signal subjected to the clip processing by a gain correction value, and further configured to input the signal after the gain processing to the first DAC; and a gain adjuster configured to restore the power of the first signal output from the first DAC to the power before the gain processing and the clip processing, and further configured to input the signal to the carrier amplifier through the first input.

10 . The amplifying apparatus according to claim 9 , wherein
the clip processing and the gain processing are not performed on a second signal, which is branched off from the signal and differs from the first signal, and the second signal is input to the peak amplifier through the second DAC.

Assignees

• Fujitsu Ltd

Inventors

• Komatsuzaki Akihiko
• Aoki Toshiyuki
• Toyoda Keigo
• Hamano Mitsuharu
• Matsubara Satoshi

Classifications

• H03F1/0288

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03G3/001 Primary

  Digital control of analog signals · CPC title