Display panel, electronic device including the same, and method for manufacturing the display panel

US2026033166A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2026033166-A1
Application numberUS-202519263276-A
CountryUS
Kind codeA1
Filing dateJul 8, 2025
Priority dateJul 26, 2024
Publication dateJan 29, 2026
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display panel includes a display area, a non-display area adjacent to the display area, a base layer including a first resin layer and a second resin layer defining an upper resin opening, a pad electrode between the first resin layer and the second resin layer, a driving element layer including a barrier layer defining a barrier opening, a data line above the barrier layer, a conductive pattern including a pad conductive portion, an insulating layer defining a connection opening and a main opening, and a bridge conductive pattern, and a display element layer above the second resin layer.

First claim

Opening claim text (preview).

1 what is claimed is: 1 . A display panel comprising: a display area; a non-display area adjacent to the display area; a base layer comprising a first resin layer overlapping the display area and the non-display area, and a second resin layer above the first resin layer and defining an upper resin opening overlapping the non-display area; a pad electrode between the first resin layer and the second resin layer, overlapping the non-display area, and having a portion of an upper surface exposed through the upper resin opening; a driving element layer comprising: a barrier layer above the second resin layer, and defining a barrier opening overlapping the upper resin opening; a data line above the barrier layer; a conductive pattern comprising a pad conductive portion in the upper resin opening and contacting the pad electrode, and a data conductive portion contacting the data line; an insulating layer above the conductive pattern, defining a connection opening exposing a portion of the data conductive portion, and defining a main opening overlapping the upper resin opening; and a bridge conductive pattern above the conductive pattern and the insulating layer, contacting the pad conductive portion through the upper resin opening, and contacting the data conductive portion through the connection opening; and a display element layer comprising a light-emitting element above the second resin layer overlapping the display area, and a transistor electrically connected to the light-emitting element and to the data line, wherein the barrier opening is defined by a protrusion barrier side surface adjacent to the connection opening, and by a main barrier side surface surrounding a portion of the upper resin opening in plan view, wherein the main opening is defined by a protrusion insulating side surface adjacent to the connection opening, and by a main insulating side surface surrounding a portion of the upper resin opening in plan view and overlapping the main barrier side surface in plan view, and wherein the protrusion barrier side surface is between the protrusion insulating side surface and the connection opening. 2 . The display panel of claim 1 , further comprising a first base insulating layer between the first resin layer and the second resin layer, and below a portion of the pad electrode. 3 . The display panel of claim 2 , further comprising a second base insulating layer between the first base insulating layer and the second resin layer, and having a portion above the pad electrode. 4 . The display panel of claim 3 , wherein the first base insulating layer and the second base insulating layer comprise silicon oxide. 5 . The display panel of claim 1 , wherein the upper resin opening has a size that is greater than a size of the connection opening in plan view. 6 . The display panel of claim 1 , wherein the upper resin opening has a size that is smaller than a size of the main opening in plan view. 7 . The display panel of claim 1 , wherein the insulating layer overlaps a boundary between the pad conductive portion and the data conductive portion. 8 . The display panel of claim 1 , wherein a distance from the protrusion barrier side surface to a center of the upper resin opening is greater than a distance from the main barrier side surface to the center of the upper resin opening. 9 . The display panel of claim 1 , wherein the barrier layer comprises at least one of silicon oxide or silicon nitride. 10 . The display panel of claim 1 , wherein the barrier opening is defined by the protrusion barrier side surface, the main barrier side surface, and a sub-barrier side surface connecting the protrusion barrier side surface and the main barrier side surface, wherein the protrusion barrier side surface is substantially parallel to a first direction, and wherein the sub-barrier side surface is substantially parallel to a second direction crossing the first direction. 11 . The display panel of claim 1 , wherein the pad electrode is provided in plural, the pad electrodes being spaced apart in a first direction. 12 . The display panel of claim 11 , wherein the upper resin opening is provided in plural, portions of upper surfaces of the pad electrodes being exposed through the upper resin openings. 13 . The display panel of claim 1 , wherein the connection opening is between the upper resin opening and the display area. 14 . The display panel of claim 1 , wherein the upper resin opening is between the connection opening and the display area. 15 . The display panel of claim 1 , wherein the upper resin opening comprises a first upper resin opening and a second upper resin opening spaced apart from the first upper resin opening in a fourth direction crossing a first direction and a second direction that crosses the first direction, and wherein the connection opening comprises a first connection opening spaced apart from the first upper resin opening in the second direction, and a second connection opening spaced apart from the second upper resin opening in a direction opposite to the second direction. 16 . The display panel of claim 1 , wherein the connection opening comprises: a first-first connection opening adjacent to the display area; and a first-second connection opening spaced apart from the first-first connection opening with the upper resin opening therebetween in plan view. 17 . An electronic device comprising: a flexible circuit board; and a display panel above the flexible circuit board, and comprising: a display area; a non-display area adjacent to the display area; a base layer comprising a first resin layer overlapping the display area and the non-display area and defining a lower resin opening, and a second resin layer above the first resin layer and defining an upper resin opening overlapping the non-display area; a pad electrode between the first resin layer and the second resin layer, overlapping the non-display area, having a portion of a lower surface contacting the flexible circuit board through the lower resin opening, and having a portion of an upper surface exposed through the upper resin opening; a driving element layer comprising: a barrier layer above the second resin layer and defining a barrier opening overlapping the upper resin opening; a data line above the barrier layer; a conductive pattern comprising a pad conductive portion in the upper resin opening and contacting the pad electrode, and a data conductive portion contacting the data line; an insulating layer above the conductive pattern, defining a connection opening exposing a portion of the data conductive portion, and defining a main opening overlapping the upper resin opening; and a bridge conductive pattern above the conductive pattern and the insulating layer, contacting the pad conductive portion through the upper resin opening, and contacting the data conductive portion through the connection opening; and a display element layer comprising a light-emitting element above the second resin layer, overlapping the display area, and electrically connected to the data line, wherein the barrier opening is defined by a protrusion barrier side surface adjacent to the connection opening, and by a main barrier side surface surrounding a portion of the upper resin opening in plan view, wherein the main opening is defined by a protrusion insulating side surface adjacent to the connection opening, and by a main insulating side surface surrounding a portion of the upper resin opening in plan view and overlapping the main barrier si

Assignees

Inventors

Classifications

  • OLEDs integrated with touch screens · CPC title

  • H10K59/131Primary

    Interconnections, e.g. wiring lines or terminals · CPC title

  • the pixel elements being TFTs · CPC title

  • Manufacture or treatment · CPC title

  • Interconnections, e.g. wiring lines or terminals (connection of the pixel electrodes to the driving transistors H10H29/39) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2026033166A1 cover?
A display panel includes a display area, a non-display area adjacent to the display area, a base layer including a first resin layer and a second resin layer defining an upper resin opening, a pad electrode between the first resin layer and the second resin layer, a driving element layer including a barrier layer defining a barrier opening, a data line above the barrier layer, a conductive patt…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/131. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Jan 29 2026 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).