System and method for traffic reshaping for ddr low power control

Patent metadata

Field	Value
Publication number	US-2026016880-A1
Application number	US-202519268515-A
Country	US
Kind code	A1
Filing date	Jul 14, 2025
Priority date	Jul 12, 2024
Publication date	Jan 15, 2026
Grant date	—

Abstract

A system and a method are disclosed for managing memory traffic in a memory device. The method includes delaying processing of the memory traffic based on a request threshold and a time threshold; and initiating or maintaining a power-down state of the memory device during a period in which the memory traffic is delayed.

First claim

What is claimed is:

1 . A method for managing memory traffic in a memory device, the method comprising:
delaying processing of the memory traffic based on a request threshold and a time threshold; and initiating or maintaining a power-down state of the memory device during a period in which the memory traffic is delayed.

2 . The method of claim 1 , further comprising:
incrementing a request counter or a time counter while traffic is delayed, and comparing the request counter to the request threshold or the time counter to the time threshold.

3 . The method of claim 1 , wherein the memory traffic is delayed in a case in which a request counter is below the request threshold and a time counter is below the time threshold.

4 . The method of claim 1 , further comprising processing the memory traffic in a case in which the request threshold or the time threshold is exceeded.

5 . The method of claim 1 , further comprising resetting the request counter and the time counter in a case in which no traffic is present.

6 . The method of claim 1 , wherein the power-down state comprises an idle power-down or an active power-down mode of a dynamic random-access memory (DRAM).

7 . The method of claim 1 , further comprising exiting the power-down state in response to processing the delayed memory traffic.

8 . The method of claim 1 , further comprising determining the request threshold and the time threshold based on a dynamic operating condition, user policy, or priority level.

9 . The method of claim 1 , further comprising:
tracking an idle counter; and initiating the power-down state in a case in which the idle count exceeds an idle threshold.

10 . The method of claim 1 , wherein delaying processing further comprises postponing transmission of the memory traffic during the period in which the memory traffic is delayed.

11 . A memory device for managing memory traffic, the memory device comprising:
a traffic reshaping device configured to delay processing of the memory traffic based on a request threshold and a time threshold; and a memory controller configured to initiate or maintain a power-down state of the memory device during a period in which the memory traffic is delayed.

12 . The memory device of claim 11 , wherein the memory controller is further configured to:
increment a request counter or a time counter while traffic is delayed, and compare the request counter to the request threshold or the time counter to the time threshold.

13 . The memory device of claim 11 , wherein the traffic reshaping device is further configured to delay the memory traffic in a case in which a request counter is below the request threshold and a time counter is below the time threshold.

14 . The memory device of claim 11 , wherein the traffic reshaping device is further configured to release the memory traffic for processing in a case in which the request threshold or the time threshold is exceeded.

15 . The memory device of claim 11 , wherein the memory controller is further configured to reset a request counter and a time counter in a case in which no memory traffic is present.

16 . The memory device of claim 11 , further comprising a dynamic random-access memory (DRAM) configured to operate in an idle power-down mode or an active power-down mode.

17 . The memory device of claim 11 , wherein the memory controller is further configured to exit the power-down state in response to processing the delayed memory traffic.

18 . The memory device of claim 11 , wherein the request threshold and the time threshold are determined based on a dynamic operating condition, user policy, or priority level.

19 . The memory device of claim 11 , wherein the memory controller is further configured to:
track an idle counter, and initiate the power-down state in a case in which the idle counter exceeds an idle threshold.

20 . The memory device of claim 11 , wherein the traffic reshaping device is further configured to postpone transmission of the memory traffic to the memory controller during the period in which the memory traffic is delayed.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Yang Li
• Cho Yunkyo
• Yoo Junhee
• Jo Manhwee
• Kathuria Tarun
• Raheja Keshav

Classifications

• G06F1/3225

  of memory devices · CPC title

• G06F1/3275 Primary

  Power saving in memory, e.g. RAM, cache · CPC title