Fast automatic gain control in a wireless receiver

Patent metadata

Field	Value
Publication number	US-2025392328-A1
Application number	US-202418749950-A
Country	US
Kind code	A1
Filing date	Jun 21, 2024
Priority date	Jun 21, 2024
Publication date	Dec 25, 2025
Grant date	—

Abstract

Methods and apparatus for performing automatic gain control in wireless receiver front-end circuitry are described. An example apparatus includes a receiver and control logic coupled to the receiver. The receiver generally includes a receive path including a first amplifier, a second amplifier having an output coupled to an input of the first amplifier, a mixer having an output coupled to an input of the second amplifier, and a third amplifier having an output coupled to an input of the mixer. The receiver also includes a first saturation detector circuit, a second saturation detector circuit, and a third saturation detector circuit. The control logic is configured to control a gain state of the third amplifier, based on one or more respective signals output from at least one of the first saturation detector circuit, the second saturation detector circuit, or the third saturation detector circuit.

First claim

1 . An apparatus for wireless communications, the apparatus comprising:
a receiver comprising:
a receive path comprising a first amplifier, a second amplifier having an output coupled to an input of the first amplifier, a mixer having an output coupled to an input of the second amplifier, and a third amplifier having an output coupled to an input of the mixer;
a first saturation detector circuit coupled to at least one output of the first amplifier and configured to generate a first signal to indicate saturation within the receiver when an output signal from the first amplifier satisfies a first criterion;
a second saturation detector circuit coupled to at least one output of the second amplifier and configured to generate a second signal to indicate saturation within the receiver when an output signal from the second amplifier satisfies a second criterion; and
a third saturation detector circuit coupled to at least one output of the third amplifier and configured to generate a third signal to indicate saturation within the receiver when an output signal from the third amplifier satisfies a third criterion; and
control logic coupled to the receiver, the control logic being configured to control a gain state of the third amplifier, based on at least one of the first signal, the second signal, or the third signal.

2 . The apparatus of claim 1 , wherein the first saturation detector circuit is further configured to:
count a first number of times that a power of the output signal from the first amplifier exceeded a first threshold over a first past time window; and count a second number of times that the power of the output signal from the first amplifier exceeded the first threshold over a second past time window.

3 . The apparatus of claim 2 , wherein the first criterion comprises (i) the first number of times being greater than or equal to a third threshold and (ii) the second number of times being less than a fourth threshold.

4 . The apparatus of claim 2 , wherein the second past time window is designated to occur prior to the first past time window.

5 . The apparatus of claim 4 , wherein a start of the first past time window is designated to occur after a predefined amount of time has elapsed after an end of the second past time window.

6 . The apparatus of claim 1 , wherein the second saturation detector circuit is further configured to count a number of times that a power of the output signal from the second amplifier exceeded a first threshold over a past time window.

7 . The apparatus of claim 6 , wherein the second criterion comprises the number of times being greater than or equal to a second threshold.

8 . The apparatus of claim 1 , wherein the third saturation detector circuit is further configured to count a number of times that a power of the output signal from the third amplifier exceeded a first threshold over a past time window.

9 . The apparatus of claim 8 , wherein the third criterion comprises the number of times being greater than or equal to a second threshold.

10 . The apparatus of claim 1 , wherein to control the gain state of the third amplifier, the control logic is configured to:
set the gain state of the third amplifier to a first gain state of a plurality of gain states; determine a second gain state from the plurality of gain states, based on an indication of saturation from the first signal; and generate a logic signal to trigger a switch in the gain state of the third amplifier from the first gain state to the second gain state.

11 . The apparatus of claim 1 , wherein to control the gain state of the third amplifier, the control logic is configured to:
set the gain state of the third amplifier to a first gain state of a plurality of gain states; determine a second gain state from the plurality of gain states, based on an indication of saturation from the first signal and an indication of saturation from the third signal; and generate a logic signal to trigger a switch in the gain state of the third amplifier from the first gain state to the second gain state.

12 . The apparatus of claim 1 , wherein to control the gain state of the third amplifier, the control logic is configured to:
set the gain state of the third amplifier to a first gain state of a plurality of gain states; determine a second gain state from the plurality of gain states, based on an indication of saturation from the first signal, an indication of saturation from the third signal, and an indication of saturation from the second signal; and generate a logic signal to trigger a switch in the gain state of the third amplifier from the first gain state to the second gain state.

13 . The apparatus of claim 1 , wherein:
the first amplifier comprises a baseband amplifier; the second amplifier comprises a transimpedance amplifier (TIA); and the third amplifier comprises a low noise amplifier (LNA).

14 . The apparatus of claim 1 , wherein the apparatus is an Internet of things (IoT) device.

15 . A wireless device comprising:
an antenna; a receiver coupled to the antenna, the receiver comprising:
a receive path comprising a first amplifier, a second amplifier having an output coupled to an input of the first amplifier, a mixer having an output coupled to an input of the second amplifier, and a third amplifier having an output coupled to an input of the mixer;
a first saturation detector circuit coupled to at least one output of the first amplifier and configured to generate a first signal to indicate saturation within the receiver when an output signal from the first amplifier satisfies a first criterion;
a second saturation detector circuit coupled to at least one output of the second amplifier and configured to generate a second signal to indicate saturation within the receiver when an output signal from the second amplifier satisfies a second criterion; and
a third saturation detector circuit coupled to at least one output of the third amplifier and configured to generate a third signal to indicate saturation within the receiver when an output signal from the third amplifier satisfies a third criterion; and
control logic coupled to the receiver, the control logic being configured to control a gain state of the third amplifier, based on at least one of the first signal, the second signal, or the third signal.

16 . The wireless device of claim 15 , wherein:
the first saturation detector circuit is further configured to (i) count a first number of times that a power of the output signal from the first amplifier exceeded a first threshold over a first past time window and (ii) count a second number of times that the power of the output signal from the first amplifier exceeded the first threshold over a second past time window; the second saturation detector circuit is further configured to count a number of times that a power of the output signal from the second amplifier exceeded a second threshold over a third past time window; and the third saturation detector circuit is further configured to count a number of times that a power of the output signal from the third amplifier exceeded a fourth threshold over a fourth past time window.

17 . The wireless device of claim 15 , wherein to control the gain state of the third amplifier, the control logic is configured to:
set the gain state of the third amplifier to a first gain state of a plurality of gain states; determine a second gain state from the plurality of gain states, based on an indication of saturation from the first signal; and generate a logic signal to trigger a switch i

Assignees

• Qualcomm Inc

Inventors

• Gurunathan Meenakshisundaram
• Chakraborty Soumen
• Thiagarajan Krishnaswamy
• Palanivelu Arul Durai Murugan
• Gardner James
• Van Nee Didier Johannes Richard
• Lnu Manav
• Jalota Rakesh
• Tiwari Anurag
• Ramachandran Balasubramanian

Classifications

• H03F3/245

  with semiconductor devices only · CPC title

• H03F2200/294

  the amplifier being a low noise amplifier [LNA] · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03G3/3068

  Circuits generating control signals for both R.F. and I.F. stages · CPC title

• H04B1/18

  Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title