Radiation detector, integrated circuit, and radiation detection method

Patent metadata

Field	Value
Publication number	US-2025383459-A1
Application number	US-202318878759-A
Country	US
Kind code	A1
Filing date	Jun 28, 2023
Priority date	Jul 20, 2022
Publication date	Dec 18, 2025
Grant date	—

Abstract

A radiation detector includes a plurality of pixel circuits each of which is provided corresponding to each of a plurality of pixels arranged along a predetermined direction and has at least one detection system configured to read out carriers from the corresponding pixel. The at least one detection system includes a counter counting the number of radiation hits, a first register holding first data which is a count value of the counter, a second register holding second data, an adder adding the first data and the second data to generate third data, and a third register holding the third data. The second data is the third data transferred from the third register of the pixel circuit provided corresponding to the pixel adjacent to the corresponding pixel in each of the plurality of pixel circuits.

First claim

1 : A radiation detector comprising:
a conversion unit including a plurality of pixels generating carriers in response to incident radiation, the plurality of pixels being arranged along a predetermined direction; and a plurality of pixel circuits each of which is provided corresponding to each of the plurality of pixels and has at least one detection system configured to read out the carriers from a corresponding pixel of the plurality of pixels, wherein the at least one detection system includes: a comparator comparing a first signal based on an amount of the carriers with a threshold value and outputting a second signal when the first signal exceeds the threshold value; a counter counting the number of second signals, each of which is the second signal; a first register holding first data which is a count value of the counter; a second register holding second data; an adder adding the first data and the second data to generate third data; and a third register holding the third data, and the second data is the third data transferred from the third register of a pixel circuit provided corresponding to a pixel adjacent to a corresponding pixel of the plurality of pixels in each of the plurality of pixel circuits.

2 : The radiation detector according to claim 1 ,
wherein the adder includes at least one of the first register, the second register, and the third register, and the at least one detection system has other registers excluding the at least one of the first register, the second register, and the third register outside the adder.

3 : The radiation detector according to claim 1 ,
wherein, in each of the plurality of pixel circuits, an area of a first region occupied by an analog circuit including the comparator is larger than an area of a second region occupied by a digital circuit including the counter, the first register, the second register, the adder, and the third register.

4 : The radiation detector according to claim 3 ,
wherein the area of the first region is equal to or larger than half of an entire area of each of the plurality of pixel circuits.

5 : The radiation detector according to claim 1 ,
wherein each of the plurality of pixel circuits has a plurality of detection systems as the at least one detection system, and threshold values in the plurality of detection systems, each of which is the threshold value of the comparator, are different for each detection system.

6 : The radiation detector according to claim 5 ,
wherein adders in the plurality of detection systems, each of which is the adder, are individually provided for each detection system.

7 : The radiation detector according to claim 5 ,
wherein the adder in each of the plurality of detection systems is common to the plurality of detection systems.

8 : The radiation detector according to claim 1 ,
wherein the number of bits of the second register is equal to or larger than a sum of the number of bits of the first register and the number of bits which is a binary representation of the number of the plurality of pixel circuits, and the number of bits of the adder is equal to the number of bits of the second register.

9 : The radiation detector according to claim 1 ,
wherein the number of bits of the second register is equal to or larger than a sum of the number of bits of the first register and the number of bits which is a binary representation of the number of the plurality of pixel circuits, the number of bits of the adder is smaller than the number of bits of the second register, and the adder repeatedly performs an operation of adding some bits of the first data in the first register and some bits of the second data in the second register corresponding to the some bits of the first data and outputting a result of the adding until all of the bits of the first data are added.

10 : The radiation detector according to claim 9 ,
wherein the number of bits of the adder is one, and the adder has a fourth register for holding a carry signal.

11 : The radiation detector according to claim 1 ,
wherein each of the plurality of pixel circuits further includes a charge sharing countermeasure circuit that, when the carriers generated by an incidence of the radiation are dispersively read out to two or more of pixel circuits of the plurality of pixel circuits, determines a pixel of the plurality of pixels corresponding to a position where the radiation is incident and corrects and evaluates the amount of carriers in the pixel, or ignores the incidence of the radiation.

12 : The radiation detector according to claim 1 ,
wherein the plurality of pixel circuits further include a switching unit for switching between an operation of transferring the third data along the predetermined direction and an operation of transferring the third data along a direction opposite to the predetermined direction.

13 : The radiation detector according to claim 1 ,
wherein each of the plurality of pixel circuits further includes a shaper circuit provided in a stage preceding the comparator, and the shaper circuit reduces a time constant of the first signal.

14 : The radiation detector according to claim 1 ,
wherein the plurality of pixel circuits have a first pixel circuit region and a second pixel circuit region, and the first data is stored in the first register at different timings in the first pixel circuit region and the second pixel circuit region.

15 : The radiation detector according to claim 14 , further comprising:
a power supply supplying a power supply voltage to each of the plurality of pixel circuits through a power transmission line; and a control unit configured to transmit a hold signal to each of the plurality of pixel circuits through a signal line, wherein the second pixel circuit region is arranged with the first pixel circuit region along a predetermined direction, and a direction in which the power transmission line is branched intersects a direction in which the signal line is branched and the predetermined direction.

16 : An integrated circuit comprising:
a plurality of pixel circuits each of which is provided corresponding to each of a plurality of pixels generating carriers in response to incident radiation, the plurality of pixels being arranged along a predetermined direction, each of the plurality of pixel circuits having at least one detection system configured to read out the carriers from a corresponding pixel of the plurality of pixels, wherein the at least one detection system includes: a comparator comparing a first signal based on an amount of the carriers with a threshold value and outputting a second signal when the first signal exceeds the threshold value; a counter counting the number of second signals, each of which is the second signal; a first register holding first data which is a count value of the counter; a second register holding second data; an adder adding the first data and the second data to generate third data; and a third register holding the third data, and the second data is the third data transferred from the third register of a pixel circuit provided corresponding to a pixel adjacent to a corresponding pixel of the plurality of pixels in each of the plurality of pixel circuits.

17 : A radiation detection method comprising:
generating carriers in response to incident radiation in a plurality of pixels arranged along a predetermined direction; reading out the carriers from a corresponding pixel of the plurality of pixels in a plurality of pixel circuits provided corresponding to the p

Assignees

• Hamamatsu Photonics Kk

Inventors

• Ichikawa Minoru
• Fujita Kazuki
• Maruyama Takumi

Classifications

• G01T1/17

  Circuit arrangements not adapted to a particular type of detector {(pulse-selection circuits H03K, G01R)} · CPC title

• G01T1/247 Primary

  Detector read-out circuitry (for processing gain or off-set correction H04N) · CPC title

• G01T1/24

  with semiconductor detectors · CPC title