Pixel define layer opening for oled module fabrication

US2025380576A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025380576-A1
Application numberUS-202519225087-A
CountryUS
Kind codeA1
Filing dateJun 2, 2025
Priority dateJun 6, 2024
Publication dateDec 11, 2025
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Embodiments of the disclosure include apparatus and methods for organic light-emitting diode (OLED) module fabrication. A plurality of recesses are formed in a pixel define layer that is formed over a surface of a substrate. The plurality of recesses in the pixel define layer are each disposed over an anode region formed in the surface of the substrate. A blanket layer of material is deposited over the pixel define layer. A first portion of the blanket layer of material disposed over a first recess of the plurality of recesses is removed to expose a first portion of the pixel define layer and form a first overhang portion above the first recess. The first portion of the pixel define layer is removed using the first overhang portion as a mask to expose at least a portion of a first anode region.

First claim

Opening claim text (preview).

We claim: 1 . A method, comprising: forming a plurality of recesses in a pixel define layer formed over a surface of a substrate, wherein the plurality of recesses in the pixel define layer are each disposed over an anode region formed in the surface of the substrate; depositing a blanket layer of material over the pixel define layer; removing a first portion of the blanket layer of material disposed over a first recess of the plurality of recesses to expose a first portion of the pixel define layer and form a first overhang portion above the first recess; and removing the first portion of the pixel define layer using the first overhang portion as a mask to expose at least a portion of a first anode region. 2 . The method of claim 1 , further comprising masking the blanket layer of material using a mask with an opening over the first portion of the blanket layer of material. 3 . The method of claim 1 , wherein the blanket layer of material includes a first layer of material and a second layer of material. 4 . The method of claim 3 , wherein the first layer of material includes at least one of aluminum, molybdenum, copper, indium zinc oxide, indium tin oxide, or another oxide. 5 . The method of claim 3 , wherein the second layer of material includes at least one of titanium, indium tin oxide, indium zinc oxide, chromium, silicon nitride, silicon oxide, or silicon oxynitride. 6 . The method of claim 1 , further comprising: removing a second portion of the blanket layer of material disposed over a second recess of the plurality of recesses to expose a second portion of the pixel define layer and form a second overhang portion above the second recess; and removing the second portion of the pixel define layer using the second overhang portion as a mask to expose at least a portion of a second anode region. 7 . The method of claim 1 , wherein the plurality of recesses in the pixel define layer are formed using a halftone mask. 8 . The method of claim 7 , wherein the halftone mask includes a halftone phase shift mask. 9 . The method of claim 1 , wherein removing the first portion of the blanket layer of material includes an etching process and the first portion of the pixel define layer is configured to mask the first anode region from the etching process. 10 . The method of claim 1 , further comprising: depositing a first emissive layer material over the portion of the first anode region; removing a second portion of the blanket layer of material disposed over a second recess of the plurality of recesses to expose a second portion of the pixel define layer and form a second overhang portion above the second recess; removing the second portion of the pixel define layer using the second overhang portion as a mask to expose at least a portion of a second anode region; and depositing a second emissive layer material over the portion of the second anode region. 11 . A method, comprising: forming a plurality of recesses in a pixel define layer formed over a surface of a substrate, wherein the plurality of recesses in the pixel define layer are each disposed over an anode region formed in the surface of the substrate; depositing a first layer of material over the pixel define layer; depositing a second layer of material over the first layer of material; removing a first portion of the first layer of material disposed over a first recess of the plurality of recesses and a first portion of the second layer of material disposed over the first recess to expose a first portion of the pixel define layer and form a first overhang portion above the first recess; and removing the first portion of the pixel define layer using the first overhang portion as a mask to expose at least a portion of a first anode region. 12 . The method of claim 11 , wherein removing the first portion of the first layer of material and the first portion of the second layer of material includes an etching process and the first portion of the pixel define layer is configured to mask the first anode region from the etching process. 13 . The method of claim 11 , wherein the first layer of material includes at least one of aluminum, molybdenum, copper, indium zinc oxide, indium tin oxide, or another oxide. 14 . The method of claim 11 , wherein the second layer of material includes at least one of titanium, indium tin oxide, indium zinc oxide, chromium, silicon nitride, silicon oxide, or silicon oxynitride. 15 . The method of claim 11 , wherein removing the first portion of the pixel define layer forms a profile in the pixel define layer. 16 . The method of claim 11 , wherein the plurality of recesses in the pixel define layer are formed using a halftone mask. 17 . The method of claim 11 , further comprising depositing a mask layer over the second layer of material having an opening over the first portion of the second layer of material. 18 . The method of claim 11 , further comprising removing a second portion of the first layer of material disposed over a second recess of the plurality of recesses and a second portion of the second layer of material disposed over the second recess to expose a second portion of the pixel define layer and form a second overhang portion above the second recess. 19 . The method of claim 18 , further comprising removing the second portion of the pixel define layer using the second overhang portion as a mask to expose at least a portion of a second anode region. 20 . A device subassembly, comprising: a substrate comprising a surface; a plurality of anode regions disposed on the surface of the substrate; a pixel define layer disposed over the surface of the substrate having a profile comprising a first step and a second step; a plurality of openings in the pixel define layer, wherein each opening of the openings in the pixel define layer is formed over an anode region of the anode regions; and a first layer of material and a second layer of material disposed over the pixel define layer, wherein: openings are formed in the first layer of material and the second layer of material, and the openings in the first layer of material and the second layer of material are formed over and surround the openings in the pixel define layer.

Assignees

Inventors

Classifications

  • Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title

  • H10K59/122Primary

    Pixel-defining structures or layers, e.g. banks · CPC title

  • characterised by their shape · CPC title

  • Manufacture or treatment · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2025380576A1 cover?
Embodiments of the disclosure include apparatus and methods for organic light-emitting diode (OLED) module fabrication. A plurality of recesses are formed in a pixel define layer that is formed over a surface of a substrate. The plurality of recesses in the pixel define layer are each disposed over an anode region formed in the surface of the substrate. A blanket layer of material is deposited …
Who is the assignee on this patent?
Applied Materials Inc
What technology area does this patent fall under?
Primary CPC classification H10K59/122. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).