Amplitude-driven at-speed control of digital-to-analog converters

US2025379590A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025379590-A1
Application numberUS-202418738559-A
CountryUS
Kind codeA1
Filing dateJun 10, 2024
Priority dateJun 10, 2024
Publication dateDec 11, 2025
Grant date

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Abstract

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Systems and techniques that facilitate amplitude-driven at-speed control of digital-to-analog converters are provided. In various embodiments, a system can comprise a digital-to-analog converter that is configured to generate an analog waveform based on a digital amplitude indicator sequence. In various aspects, the system can comprise a processor that is configured to reset an operating characteristic of the digital-to-analog converter in response to detection of a defined digital amplitude indicator subsequence in the digital amplitude indicator sequence. In various instances, the operating characteristic can be operation of a numerically controlled oscillator of the digital-to-analog converter.

First claim

Opening claim text (preview).

What is claimed is: 1 . A system, comprising: a digital-to-analog converter that is configured to generate an analog waveform based on a digital amplitude indicator sequence; and a processor that is configured to reset an operating characteristic of the digital-to-analog converter in response to detection of a defined digital amplitude indicator subsequence in the digital amplitude indicator sequence. 2 . The system of claim 1 , wherein the operating characteristic is operation of a numerically controlled oscillator of the digital-to-analog converter. 3 . The system of claim 2 , wherein the digital amplitude indicator sequence corresponds to a baseband waveform produced by a field programmable gate array. 4 . The system of claim 3 , wherein the digital-to-analog converter mixes the baseband waveform with an internal waveform produced by the numerically controlled oscillator, and wherein a core of the digital-to-analog converter computes the analog waveform based on a result of such mixing. 5 . The system of claim 4 , wherein resetting the operation of the numerically controlled oscillator in response to detection of the defined digital amplitude indicator subsequence causes a phase of the analog waveform to be synchronized with the baseband waveform, regardless of a frequency implemented by the numerically controlled oscillator. 6 . The system of claim 4 , wherein the digital-to-analog converter transmits the analog waveform to a qubit of a quantum computer, thereby causing the qubit to perform a quantum operation. 7 . The system of claim 6 , wherein a frequency implemented by the numerically controlled oscillator is not an integer multiple of a clock frequency associated with the digital-to-analog converter. 8 . The system of claim 4 , wherein the defined digital amplitude indicator subsequence is a threshold number of consecutive zero-amplitude indicators produced by the field programmable gate array. 9 . A computer-implemented method, comprising: generating, by a digital-to-analog converter, an analog waveform based on a digital amplitude indicator sequence; and resetting, by a processor coupled to the digital-to-analog converter, an operating characteristic of the digital-to-analog converter in response to detection of a defined digital amplitude indicator subsequence in the digital amplitude indicator sequence. 10 . The computer-implemented method of claim 9 , wherein the operating characteristic is operation of a numerically controlled oscillator of the digital-to-analog converter. 11 . The computer-implemented method of claim 10 , wherein the digital amplitude indicator sequence corresponds to a baseband waveform produced by a field programmable gate array. 12 . The computer-implemented method of claim 11 , wherein the digital-to-analog converter mixes the baseband waveform with an internal waveform produced by the numerically controlled oscillator, and wherein a core of the digital-to-analog converter computes the analog waveform based on a result of such mixing. 13 . The computer-implemented method of claim 12 , wherein resetting the operation of the numerically controlled oscillator in response to detection of the defined digital amplitude indicator subsequence causes a phase of the analog waveform to be synchronized with the baseband waveform, regardless of a frequency implemented by the numerically controlled oscillator. 14 . The computer-implemented method of claim 12 , further comprising: transmitting, by the digital-to-analog converter, the analog waveform to a qubit of a quantum computer, thereby causing the qubit to perform a quantum operation. 15 . The computer-implemented method of claim 14 , wherein a frequency implemented by the numerically controlled oscillator is not an integer multiple of a clock frequency associated with the digital-to-analog converter. 16 . The computer-implemented method of claim 12 , wherein the defined digital amplitude indicator subsequence is a threshold number of consecutive zero-amplitude indicators produced by the field programmable gate array. 17 . A computer program product for facilitating amplitude-driven at-speed control of digital-to-analog converters, the computer program product comprising a non-transitory computer-readable memory having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to: monitor a digital amplitude indicator sequence from which a digital-to-analog converter produces an analog waveform; and reset an operating characteristic of the digital-to-analog converter in response to detection of a defined digital amplitude indicator subsequence in the digital amplitude indicator sequence. 18 . The computer program product of claim 17 , wherein the operating characteristic is operation of a numerically controlled oscillator of the digital-to-analog converter. 19 . The computer program product of claim 18 , wherein the digital amplitude indicator sequence corresponds to a baseband waveform produced by a field programmable gate array. 20 . The computer program product of claim 19 , wherein the digital-to-analog converter mixes the baseband waveform with an internal waveform produced by the numerically controlled oscillator, wherein a core of the digital-to-analog converter computes the analog waveform based on a result of such mixing, and wherein resetting the operation of the numerically controlled oscillator in response to detection of the defined digital amplitude indicator subsequence causes a phase of the analog waveform to be synchronized with the baseband waveform, regardless of a frequency implemented by the numerically controlled oscillator.

Assignees

Inventors

Classifications

  • Bistable circuits · CPC title

  • H03M1/66Primary

    Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

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What does patent US2025379590A1 cover?
Systems and techniques that facilitate amplitude-driven at-speed control of digital-to-analog converters are provided. In various embodiments, a system can comprise a digital-to-analog converter that is configured to generate an analog waveform based on a digital amplitude indicator sequence. In various aspects, the system can comprise a processor that is configured to reset an operating charac…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H03M1/66. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Dec 11 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).