Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
US2025378784A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025378784-A1 |
| Application number | US-202519065038-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 27, 2025 |
| Priority date | Jun 10, 2024 |
| Publication date | Dec 11, 2025 |
| Grant date | — |
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A display device includes a display panel, a gate driver, a data driver, an emission driver, a driving controller, and a viewing angle controller for providing the display panel with a first viewing angle signal and a second viewing angle signal, in which display image data are alternately displayed on the display panel with different viewing angles by a first light emitting circuit and a second light emitting circuit in response to the first viewing angle signal and the second viewing angle signal, and a viewing angle of the second light emitting circuit is narrower than a viewing angle of the first light emitting circuit.
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What is claimed is: 1 . A display device comprising: a display panel including a plurality of pixels; a gate driver configured to generate a gate signal for providing the plurality of pixels with the gate signal; a data driver configured to generate a data voltage for providing the plurality of pixels with the data voltage; an emission driver configured to generate an emission signal for providing the plurality of pixels with the emission signal; a driving controller configured to generate display image data based on input image data; and a viewing angle controller configured to generate a first viewing angle signal and a second viewing angle signal for providing the plurality of pixels with the first viewing angle signal and the second viewing angle signal, wherein the display image data are alternately displayed on the display panel with different viewing angles in response to the first viewing angle signal and the second viewing angle signal, wherein each of the plurality of pixels includes: a first light emitting circuit including a first light emitting element and a first viewing angle control transistor, in which the first viewing angle control transistor is turned on in response to the first viewing angle signal for transmitting a driving current to the first light emitting element; and a second light emitting circuit including a second light emitting element and a second viewing angle control transistor, in which the second viewing angle control transistor is turned on in response to the second viewing angle signal for transmitting the driving current to the second light emitting element, and wherein a viewing angle of the second light emitting circuit is narrower than a viewing angle of the first light emitting circuit. 2 . The display device of claim 1 , wherein each of the plurality of pixels is configured to receive the first viewing angle signal and the second viewing angle signal through a first viewing angle signal line and a second viewing angle signal line respectively. 3 . The display device of claim 2 , wherein each of the plurality of pixels includes a compensation circuit, and the compensation circuit includes: a data writing transistor configured to receive the data voltage; a driving transistor configured to generate a driving current corresponding to the data voltage; and an emission transistor configured to transmit the driving current to the first light emitting circuit and the second light emitting circuit in response to the emission signal, wherein the compensation circuit is configured to compensate a threshold voltage of the driving transistor. 4 . The display device of claim 3 , wherein the gate electrode of the first viewing angle control transistor is connected to the first viewing angle signal line, a source electrode of the first viewing angle control transistor is connected to the compensation circuit, and a drain electrode of the first viewing angle control transistor is connected to an anode electrode of the first light emitting element, and the gate electrode of the second viewing angle control transistor is connected to the second viewing angle signal line, a source electrode of the second viewing angle control transistor is connected to the compensation circuit, and a drain electrode of the second viewing angle control transistor is connected to an anode electrode of the second light emitting element. 5 . The display device of claim 4 , wherein the gate electrode of the emission transistor receives the emission signal, a source electrode of the emission transistor is connected to a drain electrode of the driving transistor and a drain electrode of the emission transistor is connected to the source electrode of the first viewing angle control transistor, and the source electrode of the second viewing angle control transistor is connected to the drain electrode of the emission transistor. 6 . The display device of claim 1 , wherein the first viewing angle signal has an activation level and the second viewing angle signal has a deactivation level in an odd frame, in which the odd frame is odd-numbered frame among a series of frames, and the first viewing angle signal has a deactivation level and the second viewing angle signal has an activation level in an even frame, in which the even frame is even-numbered frame among the series of frames. 7 . The display device of claim 6 , wherein, in the odd frame, the first viewing angle signal has a logic low level and the second viewing angle signal has a logic high level, and, in the even frame, the first viewing angle signal has a logic high level and the second viewing angle signal has a logic low level. 8 . The display device of claim 1 , wherein, in an odd frame, the first viewing angle signal has an activation level and the second viewing angle signal has an activation level, in which the odd frame is odd-numbered frame among a series of frames, and, in an even frame, the first viewing angle signal has a deactivation level and the second viewing angle signal has an activation level, in which the even frame is even-numbered frame among the series of frames. 9 . The display device of claim 8 , wherein, in the odd frame, the first viewing angle signal has a logic low level and the second viewing angle signal has a logic low level, and, in the even frame, the first viewing angle signal has a logic high level and the second viewing angle signal has a logic low level. 10 . The display device of claim 1 , wherein the viewing angle controller is embedded in one of the gate driver, the data driver, the emission driver and the driving controller. 11 . A display device comprising: a display panel including a plurality of pixels; a gate driver configured to generate a gate signal for providing the plurality of pixels with the gate signal; a data driver configured to generate a data voltage for providing the plurality of pixels with the data voltage; an emission driver configured to generate an emission signal for providing the plurality of pixels with the emission signal; a driving controller configured to generate display image data based on input image data; and a viewing angle controller configured to generate a first viewing angle signal and a second viewing angle signal for providing the plurality of pixels with the first viewing angle signal and the second viewing angle signal, wherein the display image data are alternately displayed on the display panel with different viewing angles in response to the first viewing angle signal and the second viewing angle signal, wherein each of the plurality of pixels includes: a first light emitting circuit including a first light emitting element and a first viewing angle control transistor, in which the first viewing angle control transistor is turned on in response to the first viewing angle signal for transmitting a driving current to the first light emitting element; and a second light emitting circuit including a second light emitting element and a second viewing angle control transistor, in which the second viewing angle control transistor is turned on in response to the second viewing angle signal for transmitting the driving current to the second light emitting element, wherein a viewing angle of the second light emitting circuit is narrower than a viewing angle of the first light emitting circuit, and wherein the display device is configured to operate in one of a normal mode and a narrow viewing angle mode, in which a viewing angle in the narrow viewing angle mode is narrower than a viewing angle in the normal mode. 12 . The display device of claim 11 , wherein, in the normal mode, the first vie
Power management, e.g. power saving · CPC title
being a dynamic memory with more than one capacitor · CPC title
used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title
for control of viewing angle adjustment · CPC title
Details of timing specific for flat panels, other than clock recovery · CPC title
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