Junction temperature reduction with optimized gate to gate pitch

US2025366144A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025366144-A1
Application numberUS-202519213351-A
CountryUS
Kind codeA1
Filing dateMay 20, 2025
Priority dateMay 21, 2024
Publication dateNov 27, 2025
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A radio frequency device comprising a semiconductor substrate and a field-effect transistor disposed on the semiconductor substrate. The field-effect transistor includes a plurality of gate fingers that extend parallel in a width dimension. The plurality of gate fingers are spaced apart from each other along a length dimension that is orthogonal to the width dimension with a first gate-to-gate pitch and a second gate-to-gate pitch being different from the first gate-to-gate pitch. The first gate-to-gate pitch may correspond to two adjacent gate fingers arranged at an outer region of the plurality of gate fingers and the second gate-to-gate pitch may correspond to two adjacent gate fingers arranged at an inner region of the plurality of gate fingers, the first gate-to-gate pitch being smaller than the second gate-to-gate pitch. The inner region may arranged closer to a central region of the plurality of gate fingers than the outer region.

First claim

Opening claim text (preview).

What is claimed is: 1 . A radio frequency device, comprising: a semiconductor substrate; and a field-effect transistor disposed on the semiconductor substrate, the field-effect transistor including a plurality of gate fingers that extend parallel in a width dimension, the plurality of gate fingers being spaced apart from each other along a length dimension that is orthogonal to the width dimension with a first gate-to-gate pitch and a second gate-to-gate pitch being different from the first gate-to-gate pitch. 2 . The radio frequency device of claim 1 wherein the first gate-to-gate pitch corresponds to two adjacent gate fingers arranged at an outer region of the plurality of gate fingers and the second gate-to-gate pitch corresponds to two adjacent gate fingers arranged at an inner region of the plurality of gate fingers, the first gate-to-gate pitch being smaller than the second gate-to-gate pitch. 3 . The radio frequency device of claim 2 wherein a ratio of the second gate-to-gate pitch compared to the first gate-to-gate pitch is in the range of about 70/45 to about 70/65. 4 . The radio frequency device of claim 1 wherein gate fingers of the plurality of gate fingers that have the first gate-to-gate pitch have a mirrored configuration with respect to the length dimension. 5 . The radio frequency device of claim 1 wherein gate fingers of the plurality of gate fingers that have the second gate-to-gate pitch have a mirrored configuration with respect to the length dimension. 6 . The radio frequency device of claim 1 wherein the plurality of gate fingers is further spaced apart from each other along the length dimension with a third gate-to-gate pitch being different from the first gate-to-gate pitch and from the second gate-to-gate pitch. 7 . The radio frequency device of claim 1 wherein gate fingers of the plurality of gate fingers that have the third gate-to-gate pitch have a mirrored configuration with respect to the length dimension. 8 . A radio frequency device, comprising: a semiconductor substrate; and a plurality of field-effect transistors disposed in series on the semiconductor substrate, the plurality of field-effect transistors being spaced apart from each other along a length dimension with a first cell-to-cell pitch and a second cell-to-cell pitch being different from the first cell-to-cell pitch. 9 . The radio frequency device of claim 8 wherein the first cell-to-cell pitch corresponds to two adjacent field-effect transistors arranged at an outer region of the radio frequency device and the second cell-to-cell pitch corresponds to two adjacent field-effect transistors arranged at an inner region of the radio frequency device, the first cell-to-cell pitch being smaller than the second cell-to-cell pitch. 10 . The radio frequency device of claim 8 wherein field-effect transistors of the plurality of field-effect transistors that have the first cell-to-cell pitch have a mirrored configuration with respect to the length dimension. 11 . The radio frequency device of claim 8 wherein field-effect transistors of the plurality of field-effect transistors that have the second cell-to-cell pitch have a mirrored configuration with respect to the length dimension. 12 . The radio frequency device of claim 8 wherein the plurality of field-effect transistors is further spaced apart from each other along the length dimension with a third cell-to-cell pitch being different from the first cell-to-cell pitch and from the second cell-to-cell pitch. 13 . The radio frequency device of claim 8 wherein each of the plurality of field-effect transistors includes a plurality of gate fingers that extend parallel in a width dimension, the plurality of gate fingers being spaced apart from each other along the length dimension with a first gate-to-gate pitch and a second gate-to-gate pitch being different from the first gate-to-gate pitch. 14 . The radio frequency module of claim 13 wherein the first gate-to-gate pitch corresponds to two adjacent gate fingers arranged at an outer region of the plurality of gate fingers and the second gate-to-gate pitch corresponds to two adjacent gate fingers arranged at an inner region of the plurality of gate fingers, the first gate-to-gate pitch being smaller than the second gate-to-gate pitch. 15 . The radio frequency module of claim 14 wherein a ratio of the second gate-to-gate pitch compared to the first gate-to-gate pitch is in the range of about 70/45 to about 70/65. 16 . The radio frequency module of claim 13 wherein gate fingers of the plurality of gate fingers that have the first gate-to-gate pitch have a mirrored configuration with respect to the length dimension. 17 . The radio frequency module of claim 13 wherein gate fingers of the plurality of gate fingers that have the second gate-to-gate pitch have a mirrored configuration with respect to the length dimension. 18 . The radio frequency module of claim 13 wherein the plurality of gate fingers is further spaced apart from each other along the length dimension with a third gate-to-gate pitch being different from the first gate-to-gate pitch and from the second gate-to-gate pitch. 19 . The radio frequency module of claim 13 wherein gate fingers of the plurality of gate fingers that have the third gate-to-gate pitch have a mirrored configuration with respect to the length dimension.

Assignees

Inventors

Classifications

  • characterised by the relative positions of pads or connectors relative to package parts · CPC title

  • Through-vias · CPC title

  • H10W44/20Primary

    at high-frequency [HF] or radio frequency [RF] · CPC title

  • for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673) · CPC title

  • in integrated circuits · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2025366144A1 cover?
A radio frequency device comprising a semiconductor substrate and a field-effect transistor disposed on the semiconductor substrate. The field-effect transistor includes a plurality of gate fingers that extend parallel in a width dimension. The plurality of gate fingers are spaced apart from each other along a length dimension that is orthogonal to the width dimension with a first gate-to-gate …
Who is the assignee on this patent?
Skyworks Solutions Inc
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 27 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).