Metal-insulator-metal device structures and methods of forming the same

Patent metadata

Field	Value
Publication number	US-2025365997-A1
Application number	US-202519295593-A
Country	US
Kind code	A1
Filing date	Aug 9, 2025
Priority date	Dec 14, 2023
Publication date	Nov 27, 2025
Grant date	—

Abstract

Embodiments of present disclosure provide a MIM capacitor device structure including a first conductive layer and a dielectric stack disposed on the first and second portions of the first conductive layer. The dielectric stack includes a first dielectric layer disposed on the first conductive layer, a high-k dielectric layer disposed on the first dielectric layer, and a second dielectric layer disposed on the high-k dielectric layer. The structure further includes a second conductive layer disposed on the dielectric stack, a first conductive feature extending through the first conductive layer and a first portion of the dielectric stack, and a second conductive feature extending through a second portion of the dielectric stack and the second conductive layer.

First claim

1 . A structure, comprising:
a first conductive layer comprising a first portion and a second portion; a dielectric stack disposed on the first and second portions of the first conductive layer, wherein the dielectric stack comprises:
a first dielectric layer disposed on the first and second portions of the first conductive layer;
a high-k dielectric layer disposed on the first dielectric layer; and
a second dielectric layer disposed on the high-k dielectric layer;
a second conductive layer disposed on the dielectric stack, wherein the second conductive layer comprises a first portion and a second portion; and a conductive feature extending through the first portion of the first conductive layer, a portion of the dielectric stack, and the first portion of the second conductive layer.

2 . The structure of claim 1 , wherein the first and second dielectric layers each comprises TION.

3 . The structure of claim 2 , wherein the first and second dielectric layers have different thicknesses.

4 . The structure of claim 2 , wherein the first and second conductive layers each comprises TiN.

5 . The structure of claim 1 , wherein the high-k dielectric layer has a top oxygen concentration and a bottom oxygen concentration, wherein the top oxygen concentration is substantially greater than the bottom oxygen concentration.

6 . The structure of claim 5 , wherein a ratio of the bottom oxygen concentration to the top oxygen concentration ranges from about 0.91 to about 0.99.

7 . The structure of claim 1 , wherein the high-k dielectric layer has a top nitrogen concentration and a bottom nitrogen concentration, wherein the bottom nitrogen concentration is substantially greater than the top nitrogen concentration.

8 . The structure of claim 7 , wherein a ratio of the bottom nitrogen concentration to the top nitrogen concentration ranges from about 2 to about 5.

9 . A method, comprising:
depositing a first conductive layer over a substrate; patterning the first conductive layer to form a patterned first conductive layer; forming a dielectric stack on the patterned first conductive layer, comprising:
depositing a first dielectric layer;
performing a treatment process;
depositing a high-k dielectric layer on the first dielectric layer; and
depositing a second dielectric layer on the high-k dielectric layer;
depositing a second conductive layer on the dielectric stack; and patterning the second conductive layer to form a patterned second conductive layer.

10 . The method of claim 9 , wherein the treatment process is performed before the depositing of the first dielectric layer.

11 . The method of claim 9 , wherein the treatment process is performed after the depositing of the first dielectric layer.

12 . The method of claim 11 , wherein the treatment process is a plasma nitridation process.

13 . The method of claim 11 , wherein the treatment process is an N 2 plasma treatment process, an NH 3 plasma treatment process, or a combination thereof.

14 . The method of claim 11 , wherein the high-k dielectric layer is deposited by atomic layer deposition.

15 . The method of claim 14 , wherein oxygen-vacancies are formed at a bottom of the high-k dielectric layer.

16 . The method of claim 15 , further comprising filling the oxygen-vacancies with F, H, and N.

17 . A method, comprising:
depositing a first conductive layer over a substrate; forming a dielectric stack on the first conductive layer, comprising:
depositing a first dielectric layer;
performing a nitridation process on the first dielectric layer to form a nitride layer;
depositing a high-k dielectric layer on the nitride layer, wherein the high-k dielectric layer has a first oxygen concentration located at a top of the high-k dielectric layer substantially different from a second oxygen concentration located at a bottom of the high-k dielectric layer; and
depositing a second dielectric layer on the high-k dielectric layer; and
depositing a second conductive layer on the dielectric stack.

18 . The method of claim 17 , further comprising forming a first conductive feature through the first conductive layer and a first portion of the dielectric stack, and forming a second conductive feature through the second conductive layer and a second portion of the dielectric stack.

19 . The method of claim 17 , wherein the first dielectric layer comprises TiO, the nitride layer comprises TiON, and the second dielectric layer comprises TION.

20 . The method of claim 17 , wherein the high-k dielectric layer is deposited by atomic layer deposition.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lin Jen-Po
• Wei Hsiao-Kuan
• Wu Man-Yun

Classifications

• H10W20/496 Primary

  Capacitor integral with wiring layers · CPC title

• H01G4/10

  Metal-oxide dielectrics {(H01G4/085 takes precedence)} · CPC title

• H10D1/696 Primary

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

• H01L23/5223

  Electricity · mapped topic