Electronic device and manufacturing method thereof

US2025351656A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025351656-A1
Application numberUS-202519174364-A
CountryUS
Kind codeA1
Filing dateApr 9, 2025
Priority dateMay 9, 2024
Publication dateNov 13, 2025
Grant date

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A manufacturing method of electronic device includes: (a) providing a circuit substrate including: a substrate; a plurality of electronic units disposed on the substrate; and a first bonding member disposed on the substrate, wherein the first bonding member surrounds the electronic units; (b) respectively disposing a plurality of cover plates on at least part of the electronic units, and disposing a bonding material on the first bonding member, wherein one of the cover plates includes a second bonding member and, in the top view direction of the circuit substrate, the second bonding member overlaps at least part of the first bonding member, and the bonding material does not overlap the second bonding member; and (c) melting the bonding material to allow part of the bonding material to flow in between the first bonding member and the second bonding member.

First claim

Opening claim text (preview).

1 . A manufacturing method of an electronic device, comprising the steps of: (a) providing a circuit substrate including: a substrate; a plurality of electronic units disposed on the substrate; and a first bonding member disposed on the substrate, wherein, in a top view direction of the circuit substrate, the first bonding member surrounds the electronic units; (b) respectively disposing a plurality of cover plates on at least part of the electronic units, and disposing a bonding material on the first bonding member, wherein one of the cover plates includes a second bonding member and, in the top view direction of the circuit substrate, the second bonding member overlaps at least part of the first bonding member, and the bonding material does not overlap the second bonding member; and (c) melting the bonding material to allow part of the bonding material to flow in between the first bonding member and the second bonding member. 2 . The manufacturing method as claimed in claim 1 , further comprising the step of: cutting the circuit substrate and the bonding material to form a plurality of single units. 3 . The manufacturing method as claimed in claim 2 , further comprising the step of: disposing a plurality of lenses on the single units, respectively. 4 . The manufacturing method as claimed in claim 1 , wherein step (b) includes: detecting the electronic units on the circuit substrate and determining whether the electronic units are normal or defective; and respectively disposing the cover plates on the normal electronic units, and not disposing the cover plates on the defective electronic units. 5 . The manufacturing method as claimed in claim 1 , further comprising before step (c), the step of placing the circuit substrate in a cavity and vacuum-pumping the cavity. 6 . The manufacturing method as claimed in claim 1 , wherein, in the top view direction of the circuit substrate, the bonding material is formed between two adjacent electronic units. 7 . The manufacturing method as claimed in claim 1 , wherein the first bonding member includes a plurality of first openings, which respectively expose the plurality of electronic units. 8 . The manufacturing method as claimed in claim 1 , wherein the first bonding member has a thickness of 0.1 μm to 500 μm. 9 . The manufacturing method as claimed in claim 7 , wherein the cover plate further includes a main body, the second bonding member is disposed on one side of the main body, an edge of the second bonding member adjacent to the main body forms an annular structure, an edge of the annular structure is aligned with an edge of the main body, and a second opening surrounded by the annular structure exposes part of the side of the main body. 10 . The manufacturing method as claimed in claim 9 , wherein an area of the first opening of the first bonding member is equal to an area of the second opening of the second bonding member. 11 . The manufacturing method as claimed in claim 1 , wherein the second bonding member has a thickness of 0.1 μm to 500 μm, and the thickness of the second bonding member is greater than or equal to a thickness of the first bonding member. 12 . An electronic device, comprising: a circuit substrate including: a substrate; an electronic unit disposed on the substrate; and a first bonding member disposed on the substrate and surrounding the electronic unit; a cover plate disposed on the first bonding member, wherein the cover plate includes a second bonding member and, in a top view direction of the circuit substrate, the cover plate overlaps the electronic unit, and the second bonding member overlaps at least part of the first bonding member; and a bonding material including a first portion and a second portion, the first portion being disposed between the first bonding member and the second bonding member, the second portion being disposed on the first bonding member, wherein, in the top view direction of the circuit substrate, the second portion does not overlap the second bonding member, wherein a thickness of the first portion is smaller than a thickness of the second portion of the bonding material. 13 . The electronic device as claimed in claim 12 , wherein the circuit substrate further includes a limiting member disposed on the first bonding member and, in the top view direction of the circuit substrate, the limiting member is disposed around the electronic unit. 14 . The electronic device as claimed in claim 12 , wherein a thickness of the second portion of the bonding material is between 50 μm and 500 μm. 15 . The electronic device as claimed in claim 12 , wherein, in a cross-sectional view, a width of the first bonding member is greater than a width of the second bonding member. 16 . The electronic device as claimed in claim 12 , wherein the bonding material contains solder material. 17 . The electronic device according to claim 12 , wherein a material of the first bonding member includes aluminum, nickel, gold, palladium, copper, titanium, alloy thereof or a combination thereof. 18 . The electronic device as claimed in claim 12 , wherein the cover plate includes a main body and an anti-reflection layer, and the anti-reflection layer is disposed on the main body. 19 . The electronic device as claimed in claim 18 , wherein a material of the main body includes silicon, germanium, zinc sulfide, zinc selenide, gallium arsenide, chalcogenide or a combination thereof. 20 . The electronic device as claimed in claim 18 , wherein the anti-reflection layer includes a plurality of layers of first refractive index and a plurality of layers of second refractive index, wherein the layers of first refractive index and the layers of second refractive index are stacked alternately with each other, and the first refractive index is higher than the second refractive index.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Interconnections or connectors in packages · CPC title

  • Integrated devices, or assemblies of multiple devices, comprising at least one photovoltaic cell covered by group H10F10/00, e.g. photovoltaic modules · CPC title

  • Interconnections, e.g. wiring lines or terminals (connection of the pixel electrodes to the driving transistors H10H29/39) · CPC title

  • of optical field-shaping means · CPC title

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What does patent US2025351656A1 cover?
A manufacturing method of electronic device includes: (a) providing a circuit substrate including: a substrate; a plurality of electronic units disposed on the substrate; and a first bonding member disposed on the substrate, wherein the first bonding member surrounds the electronic units; (b) respectively disposing a plurality of cover plates on at least part of the electronic units, and dispos…
Who is the assignee on this patent?
Innolux Corp
What technology area does this patent fall under?
Primary CPC classification H10H29/857. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 13 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).