Bandgap reference circuit

Patent metadata

Field	Value
Publication number	US-2025321605-A1
Application number	US-202519171380-A
Country	US
Kind code	A1
Filing date	Apr 7, 2025
Priority date	Apr 11, 2024
Publication date	Oct 16, 2025
Grant date	—

Abstract

A bandgap reference circuit includes a bandgap voltage generator and a detector. The bandgap voltage generator includes an operation amplifier, an input circuit and a load circuit. The detector includes a control circuit and a response circuit. The two input terminals of the operation amplifier are respectively connected with a first node and a second node. An output terminal of the operation amplifier is connected with a bias node. The load circuit is connected with a third node. The input circuit is connected with the first node and the second node. The control circuit activates a sensing signal according to a bias voltage. When the sensing signal is activated, the bias node is connected with a power supply voltage through the response circuit. When the sensing signal is not activated, the bias node is disconnected from the power supply voltage through the response circuit.

First claim

What is claimed is:

1 . A bandgap reference circuit, comprising:
a bandgap voltage generator comprising a mirroring circuit, an operation amplifier, an input circuit and a load circuit, wherein a negative input terminal of the operation amplifier is connected with a first node of the mirroring circuit, a positive input terminal of the operation amplifier is connected with a second node of the mirroring circuit, an output terminal of the operation amplifier is connected with a bias node of the mirroring circuit, the load circuit is connected with a third node of the mirroring circuit, the input circuit is connected with the first node and the second node of the mirroring circuit, and a voltage at the third node is a bandgap voltage; and a detector comprising a control circuit and a response circuit, wherein the control circuit connected with at least one of the bias node and the third node, and the control circuit activates a sensing signal according to a bias voltage at the bias node or the bandgap voltage at the third node, wherein the response circuit receives the sensing signal, wherein when the sensing signal is activated, the first node is connected with a first power supply voltage through the response circuit, or the bias node is connected with a second power supply voltage through the response circuit, or the second node is connected with the second power supply voltage through the response circuit, wherein when the sensing signal is not activated, the first node is disconnected from the first power supply voltage through the response circuit, or the bias node is disconnected from the second power supply voltage through the response circuit, or the second node is disconnected from the second power supply voltage through the response circuit, wherein the first power supply voltage is greater than the second power supply voltage.

2 . The bandgap reference circuit as claimed in claim 1 , wherein the control circuit comprises a sensing node and a current control path, wherein a voltage at the sensing node is the sensing signal, the current control path is connected with the bias node to receive the bias voltage, and the control circuit selectively activates the sensing signal according to a change of the bias voltage.

3 . The bandgap reference circuit as claimed in claim 2 , wherein the control circuit comprises:
a first transistor, wherein a source terminal of the first transistor receives the first power supply voltage, a drain terminal of the first transistor is connected with the sensing node, and a gate terminal of the first transistor receives an enable signal; and the current control path comprising a second transistor and a pull-down circuit, wherein a source terminal of the second transistor receives the first power supply voltage, a drain terminal of the second transistor is connected with the sensing node, a gate terminal of the second transistor is connected with the bias node, and the pull-down circuit is connected between the sensing node and the second power supply voltage.

4 . The bandgap reference circuit as claimed in claim 3 , wherein the response circuit comprises an inverter and a third transistor, wherein an input terminal of the inverter is connected to the sensing node, and a gate terminal of the third transistor is connected with an output terminal of the inverter, wherein a drain terminal and a source terminal of the third transistor are respectively connected with the bias node and the second power supply voltage, or the drain terminal and the source terminal of the third transistor are respectively connected with the second node and the second power supply voltage, or the drain terminal and the source terminal of the third transistor are respectively connected with the first power supply voltage and the first node.

5 . The bandgap reference circuit as claimed in claim 3 , wherein the response circuit comprises a third transistor, and a gate terminal of the third transistor is connected with the sensing node, wherein a source terminal and a drain terminal of the third transistor are respectively connected with the bias node and the second power supply voltage, or the source terminal and the drain terminal of the third transistor are respectively connected with the second node and the second power supply voltage, or the source terminal and the drain terminal of the third transistor are respectively connected to the first power supply voltage and the first node.

6 . The bandgap reference circuit as claimed in claim 3 , wherein the pull-down circuit comprises:
a resistor, wherein a first terminal of the resistor is connected with the sensing node; and a third transistor, wherein a drain terminal of the third transistor is connected with a second terminal of the resistor, a source terminal of the third transistor receives the second power supply voltage, and a gate terminal of the third transistor receives the enable signal.

7 . The bandgap reference circuit as claimed in claim 3 , wherein the pull-down circuit comprises a third transistor, wherein a drain terminal of the third transistor is connected with the sensing node, a source terminal of the third transistor receives the second power supply voltage, and a gate terminal of the third transistor receives the enable signal.

8 . The bandgap reference circuit as claimed in claim 1 , wherein the control circuit comprises a sensing node and a first current control path, wherein a voltage at the sensing node is the sensing signal, the first current control path is connected with the third node to receive the bandgap voltage, and the control circuit selectively activates the sensing signal according to a change of the bandgap voltage.

9 . The bandgap reference circuit as claimed in claim 8 , wherein the control circuit comprises:
a first transistor, wherein a source terminal of the first transistor receives the first power supply voltage, a drain terminal of the first transistor is connected with a fourth node, and a gate terminal of the first transistor receives an enable signal; a second transistor, wherein a drain terminal of the second transistor is connected with the sensing node, a source terminal of the second transistor receives the second power supply voltage, and a gate terminal of the second transistor receives an inverting enable signal; a current mirror, wherein a current input terminal of the current mirror is connected with the fourth node, and a current mirroring terminal of the current mirror is connected with the sensing node; the first current control path connected between the sensing node and the second power supply voltage; and a second current control path connected between the fourth node and) the second power supply voltage.

10 . The bandgap reference circuit as claimed in claim 9 , wherein the first current control path comprises a third transistor and a fourth transistor, and the second current control path comprises a fifth transistor and a current source,
wherein a drain terminal of the third transistor is connected with the sensing node, a gate terminal of the third transistor is connected with the third node, a drain terminal of the fourth transistor is connected with a source terminal of the third transistor, a source terminal of the fourth transistor receives the second power supply voltage, and a gate terminal of the fourth transistor receives the enable signal; and wherein a drain terminal of the fifth transistor is connected with the fourth node, a gate terminal of the fifth transistor receives the enable signal, and the current source is connected between a source terminal of the fifth transistor and the second power supply voltage.

11 . The bandgap reference

Assignees

• Ememory Technology Inc

Inventors

• Ho Hsin-Liang
• Lin Chun-Fu

Classifications

• H02M3/071

  adapted to generate a negative voltage output from a positive voltage source · CPC title

• H02M3/07 Primary

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G11C7/00

  Arrangements for writing information into, or reading information out from, a digital store (G11C5/00 takes precedence; auxiliary circuits for stores using semiconductor devices G11C11/4063, G11C11/413) · CPC title

• H10D62/121

  oriented parallel to substrates · CPC title

• G11C16/26

  Sensing or reading circuits; Data output circuits · CPC title