Methods for fabrication of mmic and rf devices on engineered substrates

US2025316618A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025316618-A1
Application numberUS-202519240965-A
CountryUS
Kind codeA1
Filing dateJun 17, 2025
Priority dateOct 14, 2020
Publication dateOct 9, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A method of fabricating a MMIC system includes providing an engineered substrate including a growth substrate and a device layer coupled to the growth substrate, fabricating a plurality of MMIC device elements using the device layer, and providing a carrier substrate including a plurality of metallic structures. The method also includes bonding the plurality of metallic structures to the plurality of MMIC device elements, removing a portion of the growth substrate, and removing a portion of the carrier substrate. The method further includes forming a ground/power plane coupled to the growth substrate, forming a plurality of vias passing from the ground/power plane to one or more of the plurality of MMIC device elements, and joining a cooling structure to the carrier substrate.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of fabricating a MMIC system, the method comprising: providing an engineered substrate including a growth substrate and a device layer coupled to the growth substrate; fabricating a plurality of MMIC device elements using the device layer; providing a carrier substrate including a plurality of metallic structures; bonding the plurality of metallic structures to the plurality of MMIC device elements; removing a portion of the growth substrate; removing a portion of the carrier substrate; forming a ground/power plane coupled to the growth substrate; forming a plurality of vias passing from the ground/power plane to one or more of the plurality of MMIC device elements; and joining a cooling structure to the carrier substrate. 2 . The method of claim 1 further comprising joining a second cooling structure to the ground/power plane. 3 . The method of claim 1 further comprising, prior to joining the cooling structure to the carrier substrate: forming a second ground/power plane coupled to the carrier substrate; and forming a second plurality of vias passing from the second ground/power plane to one or more of the plurality of metallic structures. 4 . The method of claim 3 further comprising joining a second cooling structure to the ground/power plane. 5 . The method of claim 1 wherein a coefficient of thermal expansion (CTE) of the growth substrate substantially matches a CTE of the device layer. 6 . The method of claim 1 wherein the growth substrate comprises a polycrystalline ceramic core. 7 . The method of claim 6 wherein the polycrystalline ceramic core comprises aluminum nitride. 8 . The method of claim 1 wherein a thickness of the device layer is between 1 and 10 μm. 9 . The method of claim 8 wherein the device layer comprises gallium nitride (GaN). 10 . The method of claim 1 wherein the plurality of metallization structures are disposed between the plurality of MMIC device elements and the carrier substrate. 11 . The method of claim 1 wherein each of the plurality of MMIC device elements includes a corresponding metal structure and each of the plurality of metallic structures is joined to one of the corresponding metal structures. 12 . The method of claim 1 wherein bonding the plurality of metallic structures to the plurality of MMIC device elements comprises directly connecting the plurality of metallic structures to the plurality of MMIC device elements. 13 . The method of claim 1 wherein the carrier substrate is directly connected to the plurality of metallization structures. 14 . The method of claim 1 wherein the plurality of MMIC device elements are disposed between the device layer and the plurality of metallization structures.

Assignees

Inventors

Classifications

  • Separation of active layers from substrates · CPC title

  • for monolithic microwave integrated circuits [MMIC] · CPC title

  • of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04) · CPC title

  • characterised by their shape, e.g. having conical or cylindrical projections · CPC title

  • Power or ground buses · CPC title

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What does patent US2025316618A1 cover?
A method of fabricating a MMIC system includes providing an engineered substrate including a growth substrate and a device layer coupled to the growth substrate, fabricating a plurality of MMIC device elements using the device layer, and providing a carrier substrate including a plurality of metallic structures. The method also includes bonding the plurality of metallic structures to the plural…
Who is the assignee on this patent?
Qromis Inc
What technology area does this patent fall under?
Primary CPC classification H10W44/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 09 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).