Data Stream Processor

Patent metadata

Field	Value
Publication number	US-2025315439-A1
Application number	US-202519243263-A
Country	US
Kind code	A1
Filing date	Jun 19, 2025
Priority date	Jul 26, 2023
Publication date	Oct 9, 2025
Grant date	—

Abstract

Provided is a data stream processor comprising a streamed data transceiver interface, a structure of processing units configurable to transform data received from a data source over the streamed data transceiver interface according to a specified output requirement, and a configuration unit operable in electronic communication with a data consumer to receive an output requirement and to configure the operation and linkage of a processing unit in the structure of processing units to transform input data to output data according to the specified output requirement; wherein the structure of processing units is further operable to provide the output data for output over the streamed data transceiver interface.

First claim

1 . A pipeline data processing stack comprising:
a first compute unit comprising first processing units configurable to transform visual data received from a first data source over a data transceiver interface; and a second compute unit comprising second processing units configurable to transform machine learning data received from a second data source over the data transceiver interface; wherein the first compute unit comprises a first configuration unit operable in electronic communication with a graph scheduler to configure operation and processing unit linkage of the first compute unit to transform visual input data to first relative output data according to scheduling from the graph scheduler; wherein the second compute unit comprises a second configuration unit operable in electronic communication with the graph scheduler to configure operation and processing unit linkage of the second compute unit to transform machine learning input data to second relative output data according to scheduling from the graph scheduler; and wherein the data transceiver interface is operable to transmit the first and second relative output data according to scheduling from the graph scheduler.

2 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises a change in data content between input data and output data.

3 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises a change in data format between input data and output data.

4 . The pipeline data processing stack according to claim 1 , wherein at least one of the first and the second configuration units is operable to configure an instance of the first or the second processing units to operate sequentially.

5 . The pipeline data processing stack according to claim 1 , wherein at least one of the first and the second configuration units is operable to configure an instance of the first or the second processing units to operate in parallel.

6 . The pipeline data processing stack according to claim 1 , wherein at least one processing unit of the first or the second processing units comprises at least one instruction primitive circuit.

7 . The pipeline data processing stack according to claim 6 , wherein the at least one processing unit comprises a plurality of instruction primitive circuits operable to combine to perform at least one higher-level instruction.

8 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises filtering the data.

9 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises converting data to a specified format.

10 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises tiling data for n-dimensional tiled processing.

11 . The pipeline data processing stack according to claim 1 , wherein at least one transform comprises synchronizing timing-sensitive data.

12 . The pipeline data processing stack according to claim 1 , wherein transmitting the first and second relative output data comprises providing the first and second relative output data to a further structure of processing units configurable to process the first and second relative output data.

13 . The pipeline data processing stack according to claim 1 , wherein transmitting the first and second relative output data comprises providing the first and second relative output data by a direct data-passing interface to a compression/decompression engine.

14 . The pipeline data processing stack according to claim 1 , wherein transmitting the first and second relative output data comprises providing the first and second relative output data by a direct data-passing interface to a direct memory access controller.

15 . A method of operating a pipeline data processing stack comprising:
configuring a first compute unit comprising first processing units to transform visual data received from a first data source over a data transceiver interface; and configuring a second compute unit comprising second processing units to transform machine learning data received from a second data source over the data transceiver interface; operating the first compute unit in electronic communication with a graph scheduler to configure operation and processing unit linkage of the first compute unit and to transform visual input data to first relative output data according to scheduling from the graph scheduler; operating the second compute unit in electronic communication with the graph scheduler to configure operation and processing unit linkage of the second compute unit and to transform machine learning input data to second relative output data according to scheduling from the graph scheduler; and operating the data transceiver interface to transmit the first and second relative output data according to scheduling from the graph scheduler.

16 . The method according to claim 15 , wherein at least one transform comprises a change in data content.

17 . The method according to claim 15 , wherein at least one transform comprises a change in data format.

18 . The method according to claim 15 , wherein transmitting the first and second relative output data comprises providing the output data by a direct data-passing interface to a compression/decompression engine.

19 . The method according to claim 15 , wherein providing the output data comprises providing the first and second relative output data by a direct data-passing interface to a direct memory access controller.

20 . A computer program product stored on a non-transitory storage medium and comprising program code to cause a computer system having a pipeline data processing stack to:
configure a first compute unit comprising first processing units to transform visual data received from a first data source over a data transceiver interface; and configure a second compute unit comprising second processing units to transform machine learning data received from a second data source over the data transceiver interface; operate the first compute unit in electronic communication with a graph scheduler to configure operation and processing unit linkage of the first compute unit and to transform visual input data to first relative output data according to scheduling from the graph scheduler; operate the second compute unit in electronic communication with the graph scheduler to configure operation and processing unit linkage of the second compute unit and to transform machine learning input data to second relative output data according to scheduling from the graph scheduler; and operate the data transceiver interface to transmit the first and second relative output data according to scheduling from the graph scheduler.

Assignees

• Advanced Risc Mach Ltd

Inventors

• Modrzyk Damian Piotr
• Ünal Metin Gokhan
• Gabrielli Giacomo
• VENU Balaji

Classifications

• G06F16/24542 Primary

  Plan optimisation · CPC title

• G06F16/24568 Primary

  Data stream processing; Continuous queries · CPC title