Power semiconductor device and power conversion device

Patent metadata

Field	Value
Publication number	US-2025301760-A1
Application number	US-202318863681-A
Country	US
Kind code	A1
Filing date	Jul 7, 2023
Priority date	Jul 14, 2022
Publication date	Sep 25, 2025
Grant date	—

Abstract

A first surface shape of a module base and a second surface shape of a heatsink base are fitted to each other, and thus the module base and the heatsink base are fixed to each other. One of the first surface shape and the second surface shape includes a first protrusion and a second protrusion, and the other includes a first recess fitted to the first protrusion and a second recess fitted to the second protrusion. The first protrusion has a tip end in contact with the first recess, and the second protrusion has a tip end away from the second recess.

First claim

1 . A power semiconductor device comprising:
a module base having a mounting surface and a back surface opposite to the mounting surface in a thickness direction; a semiconductor element mounted on the mounting surface of the module base; a resin sealing portion sealing the semiconductor element on the mounting surface of the module base; and a heatsink base having an attachment surface attached to the back surface of the module base and a heat dissipation surface opposite to the attachment surface in the thickness direction, wherein a first surface shape of the back surface of the module base and a second surface shape of the attachment surface of the heatsink base are fitted to each other, and thus the back surface of the module base and the attachment surface of the heatsink base are fixed to each other, one of the first surface shape and the second surface shape includes a first protrusion and a second protrusion, and an other includes a first recess fitted with the first protrusion and a second recess fitted with the second protrusion, and the first protrusion has a tip end in contact with the first recess, and the second protrusion has a tip end away from the second recess, and the second protrusion is lower than the first protrusion.

2 . The power semiconductor device according to claim 1 , wherein in a cross sectional view parallel to the thickness direction, a height of the second protrusion is 0.5 mm or more, and a width of the second protrusion is 65% or more and less than 100% of a width of the second recess.

3 . The power semiconductor device according to claim 1 , wherein in a cross sectional view parallel to the thickness direction, no gap is formed or a gap smaller than a gap between the second protrusion and the second recess is formed between the first protrusion and the first recess.

4 . The power semiconductor device according to claim 1 , wherein in a cross sectional view parallel to the thickness direction, no gap is formed or a gap having an area of 50% or less of an area of the first recess is formed between the first protrusion and the first recess.

5 . The power semiconductor device according to claim 1 , wherein a surface pressure is applied at least locally between the first protrusion and the first recess.

6 . The power semiconductor device according to claim 1 , wherein no surface pressure is applied or a maximum surface pressure lower than a maximum surface pressure between the first protrusion and the first recess is applied between the second protrusion and the second recess.

7 . The power semiconductor device according to claim 1 , wherein a surface pressure is applied at least locally between the second protrusion and the second recess.

8 . The power semiconductor device according to claim 1 , wherein
the heatsink base includes an outer surface opposite to the heat dissipation surface, the outer surface being disposed outside the attachment surface in an in-plane direction perpendicular to the thickness direction, and the outer surface is disposed to be shifted toward the heat dissipation surface relative to the attachment surface in the thickness direction.

9 . The power semiconductor device according to claim 1 , wherein a planar layout perpendicular to the thickness direction of a recess group including the first recess and the second recess includes a plurality of patterns each extending along a first direction and arranged at intervals in a second direction perpendicular to the first direction.

10 . The power semiconductor device according to claim 1 , wherein a planar layout perpendicular to the thickness direction of a recess group including the first recess and the second recess includes a plurality of patterns each extending along a first direction and arranged at intervals in a second direction perpendicular to the first direction, and at least one pattern extending along a third direction different from the first direction.

11 . The power semiconductor device according to claim 1 , wherein the module base or the heatsink base includes a third recess, and a member including an insertion portion inserted into the third recess and a projection portion projecting from the third recess, and the projection portion constitutes the second protrusion.

12 . A power conversion apparatus comprising:
a main conversion circuit that includes the power semiconductor device according to claim 1 and converts and outputs power that is input; and a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

13 . The power semiconductor device according to claim 1 , wherein in a cross sectional view parallel to the thickness direction, the first protrusion is one of a plurality of first protrusions and the second protrusion is one of a plurality of second protrusions, the first protrusions and the second protrusions being alternately arranged, all the second protrusions being disposed between a pair of protrusions included in the plurality of the first protrusions.

Assignees

• Mitsubishi Electric Corp

Inventors

• Tada Haruna
• Sanda Yasuyuki
• Goto Masaki
• Morisada Tatsushi
• Terada hayato
• Rokubuichi Hodaka
• Ito Yoshinori

Classifications

• H10W90/00

  Package configurations · CPC title

• H10W74/111 Primary

  the semiconductor body being completely enclosed · CPC title

• H10W40/255

  having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

• H10W40/226

  characterised by projecting parts, e.g. fins to increase surface area (leadframes for cooling H10W70/461) · CPC title

• H10W40/60

  Securing means for detachable heating or cooling arrangements, e.g. clamps · CPC title