Apparatus and method for implementing a bounding volume hierarchy with oriented bounds using quantized shared orientations

US2025299411A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025299411-A1
Application numberUS-202418611560-A
CountryUS
Kind codeA1
Filing dateMar 20, 2024
Priority dateMar 20, 2024
Publication dateSep 25, 2025
Grant date

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Abstract

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Apparatus and method for a BVH with oriented bounds using quantized shared orientations. For example, one embodiment of an apparatus comprises: traversal hardware logic to traverse rays through a bounding volume hierarchy (BVH); and BVH construction circuitry to generate a BVH with one or more oriented bounding boxes (OBBs), the BVH construction circuitry to project geometry of one or more child nodes along one or more orientation directions to determine corresponding upper and lower bound values; the traversal hardware logic comprising OBB processing logic to: project a ray along the one or more orientation directions; responsively determine ray-plane intersection distances to one or more near and far bounding planes corresponding to the orientation directions; and determine a hit or miss based on the ray-plane intersection distances to the near and far bounding planes.

First claim

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What is claimed is: 1 . A graphics processor, comprising: bounding volume hierarchy (BVH) construction circuitry to generate a BVH with one or more oriented bounding boxes (OBBs), the BVH construction circuitry to project geometry of one or more child nodes along one or more orientation directions to determine corresponding upper and lower bound values; and traversal hardware logic to traverse rays through nodes of the BVH, the traversal hardware logic comprising OBB processing logic to: project a ray along the one or more orientation directions; responsively determine ray-plane intersection distances to one or more near and far bounding planes corresponding to the orientation directions; and determine a hit or miss based on the ray-plane intersection distances to the one or more near and far bounding planes. 2 . The graphics processor of claim 1 , wherein the nodes of the BVH store N shared orientation directions that are used to bound M child nodes, using bounds along a different subset of K orientation directions per child node. 3 . The graphics processor of claim 1 , wherein the traversal hardware logic is further to determine the hit or miss by comparing a maximum of the ray-plane intersection distances to the near bounding planes to a minimum of the ray-plane intersection distances to the far bounding planes. 4 . The graphics processor of claim 2 , wherein the K orientation directions comprise quantized orientation directions. 5 . The graphics processor of claim 4 , wherein the orientation directions are quantized using a signed fixed point number for each dimension. 6 . The graphics processor of claim 4 , wherein the orientation directions are quantized by storing an index, with the orientation direction being defined by a lookup from a precalculated orientation direction table using that index. 7 . The graphics processor of claim 1 , wherein projecting the ray along the one or more orientation directions comprises performing a dot product of an origin of the ray and the one or more orientation directions and/or a direction of the ray and the one or more orientation directions. 8 . The graphics processor of claim 7 , wherein the BVH construction circuitry stores quantized bounds for each instance of projected geometry of M child nodes along K quantized orientation directions. 9 . The graphics processor of claim 8 , wherein once the origin of the ray and direction of the ray are projected, K ray/plane intersection distances are determined for lower and upper bounding planes for a child node. 10 . The graphics processor of claim 9 , wherein the traversal hardware logic is to dequantize the lower and upper bounding planes for the child node to determine the intersection distances. 11 . The graphics processor of claim 1 , wherein the BVH construction circuitry is to generate the BVH based on a plurality of graphics primitives, the one or more child nodes corresponding to one or more of the graphics primitives. 12 . The graphics processor of claim 1 , further comprising: a plurality of graphics processor core blocks to execute a plurality of shaders, wherein a ray generation shader of the plurality of shaders is to generate the ray. 13 . A method, comprising: generating a BVH with one or more oriented bounding boxes (OBBs), wherein geometry of one or more child nodes is projected along one or more orientation directions corresponding to the one or more OBBs to determine corresponding upper and lower bound values; projecting a ray along the one or more orientation directions; responsively determining ray-plane intersection distances to one or more near and far bounding planes corresponding to the orientation directions; and determining a hit or miss based on the ray-plane intersection distances to the one or more near and far bounding planes. 14 . The method of claim 13 , wherein the nodes of the BVH store N shared orientation directions that are used to bound M child nodes, using bounds along a different subset of K orientation directions per child node. 15 . The method of claim 14 , wherein the hit or miss is determined by comparing a maximum of the ray-plane intersection distances to the near bounding planes to a minimum of the ray-plane intersection distances to the far bounding planes. 16 . The method of claim 14 , wherein the K orientation directions comprise quantized orientation directions. 17 . The method of claim 16 , wherein the orientation directions are quantized using a signed fixed point number for each dimension. 18 . The method of claim 16 , wherein the orientation directions are quantized by storing an index, with the orientation direction being defined by a lookup from a precalculated orientation direction table using that index. 19 . The method of claim 13 , wherein projecting the ray along the one or more orientation directions comprises performing a dot product of an origin of the ray and the one or more orientation directions and/or a direction of the ray and the one or more orientation directions. 20 . The method of claim 13 , further comprising: storing quantized bounds for each instance of projected geometry of M child nodes along K quantized orientation directions.

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What does patent US2025299411A1 cover?
Apparatus and method for a BVH with oriented bounds using quantized shared orientations. For example, one embodiment of an apparatus comprises: traversal hardware logic to traverse rays through a bounding volume hierarchy (BVH); and BVH construction circuitry to generate a BVH with one or more oriented bounding boxes (OBBs), the BVH construction circuitry to project geometry of one or more chil…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification G06T15/005. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Sep 25 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).