Semiconductor device

Patent metadata

Field	Value
Publication number	US-2025293128-A1
Application number	US-202519222550-A
Country	US
Kind code	A1
Filing date	May 29, 2025
Priority date	May 13, 2019
Publication date	Sep 18, 2025
Grant date	—

Abstract

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

First claim

1 . A GaN semiconductor device comprising:
a first semiconductor element including a first obverse surface and a first reverse surface that are spaced apart in a thickness direction, the first obverse surface being provided with a first drain electrode, a first source electrode, and a first gate electrode; a second semiconductor element including a second obverse surface and a second reverse surface that are spaced apart in the thickness direction, the second obverse surface being provided with a second drain electrode, a second source electrode, and a second gate electrode; a control element electrically connected to the first gate electrode and the second gate electrode; a plurality of leads spaced apart from each other; a first connection member having a first end joined to the first source electrode; and a second connection member having a first end joined to the second drain electrode, wherein the plurality of leads include a first lead opposed to the first reverse surface and on which the first semiconductor element is mounted, a second lead opposed to the second reverse surface and on which the second semiconductor element is mounted, and a third lead on which the control element is mounted, the first lead includes a first die pad portion to which the first semiconductor element is joined and a first bonding portion to which a second end of the first connection member is joined, the first bonding portion is located between the first semiconductor element and the second semiconductor element as viewed in the thickness direction, and a second end of the second connection member is joined to the first bonding portion.

2 . The semiconductor device according to claim 1 , wherein the first lead and the second lead overlap with each other as viewed in a first direction perpendicular to the thickness direction.

3 . The semiconductor device according to claim 2 , wherein the third lead overlaps with the first lead and the second lead as viewed in a second direction perpendicular to the thickness direction and the first direction.

4 . The semiconductor device according to claim 3 , further comprising a third connection member having a first end joined to the first drain electrode,
wherein the plurality of leads further include a fourth lead to which a second end of the third connection member is joined, and the fourth lead overlaps with both the first lead and the second lead as viewed in the first direction and is disposed opposite to the second lead with respect to the first lead in the first direction.

5 . The semiconductor device according to claim 4 , wherein the first die pad portion and the first bonding portion are formed in one piece.

6 . The semiconductor device according to claim 5 , further comprising a fourth connection member having a first end joined to the second source electrode,
wherein the second lead includes a second die pad portion to which the second semiconductor element is joined and a second bonding portion to which a second end of the fourth connection member is joined, and the second die pad portion is closer to the first die pad portion than is the second bonding portion as viewed in the thickness direction.

7 . The semiconductor device according to claim 6 , wherein the second die pad portion and the second bonding portion are formed in one piece.

8 . The semiconductor device according to claim 7 , further comprising a fifth connection member having a first end joined to the control element.

9 . The semiconductor device according to claim 8 , further comprising a fifth lead arranged adjacent to the fourth lead in the second direction.

10 . The semiconductor device according to claim 9 , further comprising a sixth lead arranged adjacent to the second lead in the second direction. 11 , The semiconductor device according to claim 1 , further comprising a sealing member covering at least the first semiconductor element, the second semiconductor element and the control element.

12 . The semiconductor device according to claim 11 , wherein the first lead and the second lead are each provided with a dislodgement-preventing portion held in contact with the sealing member.

13 . The semiconductor device according to claim 11 , wherein the first lead and the second lead are each provided with a recessed portion exposed from the sealing member.

14 . The semiconductor device according to claim 13 , wherein the recessed portion of the first lead and the recessed portion of the second lead are disposed along a same side of the semiconductor device.

15 . The semiconductor device according to claim 1 , wherein the first connection member and the second connection member each comprise a metal clip.

16 . The semiconductor device according to claim 1 , wherein the third lead is greater in length than the first lead in the first direction.

17 . The semiconductor device according to claim 1 , wherein the first gate electrode is spaced apart from the first source electrode in the second direction.

18 . The semiconductor device according to claim 1 , wherein the first drain electrode and the first source electrode have a band shape, and
the band shapes of the first drain electrode and the first source electrode are elongated and parallel to each other.

19 . The semiconductor device according to claim 1 , wherein the second drain electrode is disposed between the first gate electrode and the second gate electrode in the first direction.

20 . The semiconductor device according to claim 1 , wherein the first connection member comprises a first plurality of wires connected to the first bonding portion, the second connection member comprises a second plurality of wires connected to the first bonding portion, and the second plurality of wires are greater in number than the first plurality of wires.

Assignees

• Rohm Co Ltd

Inventors

• Saito Koshun
• Sakairi Hiroyuki
• Matsuoka Yasufumi
• Yoshimochi Kenichi

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W70/481 Primary

  for devices being provided for in groups H10D8/00 - H10D48/00 · CPC title

• H10W70/465

  Bumps or wires · CPC title

• H10W70/411

  Chip-supporting parts, e.g. die pads · CPC title

• H10W72/07653

  changes in shapes · CPC title