Nano/micro-channel evaporator for thermal management

US2025280511A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025280511-A1
Application numberUS-202519052120-A
CountryUS
Kind codeA1
Filing dateFeb 12, 2025
Priority dateFeb 12, 2024
Publication dateSep 4, 2025
Grant date

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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An evaporator for purposes of thermal management of various electronic devices includes one or more supporting planar structures. A plurality of nano/micro-channels are formed in a surface of each of the one or more supporting planar structures, the plurality of nano/micro-channels being in parallel and spaced relation to one another. A pair of reservoirs may be disposed at opposing ends of the evaporator in which at least one of the reservoirs contains a quantity of a heat dissipative fluid. In at least one version, a plurality of single plane evaporators can be formed in a vertically stacked configuration, which is supported by at least one manifold(s) configured to permit heat dissipative fluid to enter and exit each evaporator.

First claim

Opening claim text (preview).

1 . An evaporator configured for thermal management of one or more electronic devices, the evaporator comprising one or more supporting planar structures; an array of channels formed in a surface of each of the one or more supporting planar structures, each of the channels of the array being in parallel relation to one another; and a pair of reservoirs in fluidic communication with the array of channels, each reservoir being disposed at an opposing end of the evaporator in which at least one of the reservoirs contains a quantity of a heat-dissipating fluid. 2 . The evaporator according to claim 1 , further comprising a plurality of the supporting planar structures disposed in a vertically stacked arrangement. 3 . The evaporator according to claim 1 , wherein the heat dissipating fluid is FC72. 4 . The evaporator according to claim 1 , further comprising a cover/substrate disposed over the one or more supporting planar structures. 5 . The evaporator according to claim 4 , wherein the cover/substrate comprises at least one opening aligned with one of the reservoirs to permit ingress of the heat dissipating fluid into the evaporator. 6 . The evaporator according to claim 5 , wherein the cover/substrate is made from a transparent material. 7 . The evaporator according to claim 2 , further comprising at least one manifold configured to retain the stacked configuration of supporting planar structures at opposing ends thereof. 8 . The evaporator according to claim 7 , wherein the at least one manifold is defined by a cavity that is shaped and sized to fit the respective ends of the stacked arrangement of supporting planar structures. 9 . The evaporator according to claim 8 , wherein the at least one manifold includes an opening to allow for the heat dissipative fluid to ingress the evaporator. 10 . The evaporator according to claim 1 , wherein the array of channels are nanochannels. 11 . The evaporator according to claim 1 , wherein the end reservoirs are microreservoirs. 12 . A method for enabling thermal management of electronic devices, the method comprising: providing an evaporator sized and configured for placement in relation to an electronic device; and forming the evaporator from one or more supporting structures, each of the supporting structures including an array of channels formed on a surface of the supporting substrate, and through which a quantity of heat dissipating fluid is configured to flow relative to an end reservoir also formed in the supporting structure and fluidly connected to the array of nano/microchannels in which a cover is provided onto the one or more supporting structures; and providing a heat dissipating fluid within at least one of the reservoirs, the heat dissipating fluid being configured to produce heat transfer via evaporation relative to the electronic device as the heat-dissipative fluid is caused to wick along the array of nano/microchannels. 13 . The method according to claim 12 , including forming the evaporator by disposing a plurality of supporting planar structures in a vertically stacked arrangement, in which each of the supporting planar structures comprises a formed array of nano or micro sized channels. 14 . The method according to claim 13 , further comprising disposing at least one manifold in to respective ends of the vertically stacked arrangement of supporting structures. 15 . The method according to claim 12 , in which the heat dissipating fluid is FC72. 16 . The method according to claim 14 , wherein the at least one manifold is configured with at least one opening for the ingress and egress of heat dissipative fluid. 17 . The method according to claim 14 , wherein the at least one manifold includes a side opening shaped and configured for receiving an end of the vertically stacked arrangement of the supporting planar structures.

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What does patent US2025280511A1 cover?
An evaporator for purposes of thermal management of various electronic devices includes one or more supporting planar structures. A plurality of nano/micro-channels are formed in a surface of each of the one or more supporting planar structures, the plurality of nano/micro-channels being in parallel and spaced relation to one another. A pair of reservoirs may be disposed at opposing ends of the…
Who is the assignee on this patent?
Univ Syracuse
What technology area does this patent fall under?
Primary CPC classification H05K7/20309. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 04 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).