Method of manufacturing semiconductor device

US2025279303A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2025279303-A1
Application numberUS-202418991288-A
CountryUS
Kind codeA1
Filing dateDec 20, 2024
Priority dateMar 1, 2024
Publication dateSep 4, 2025
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor device includes a step of performing processing and a step of transporting. In the step of performing processing, processing for forming a semiconductor element is performed on a semiconductor substrate made from silicon carbide and having a diameter W of 200 mm or more. In the step of transporting, at least one of before and after processing, a semiconductor substrate is accommodated and transported in a FOUP, which is a transport carrier capable of accommodating a maximum of 25 semiconductor substrates.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of manufacturing a semiconductor device, the method comprising: a step of preparing a semiconductor substrate made from silicon carbide and having a diameter W of 200 mm or more; a step of performing processing for forming a semiconductor element on the semiconductor substrate; and a step of accommodating and transporting the semiconductor substrate in a FOUP that is a transport carrier capable of accommodating a maximum of 25 of the semiconductor substrates at least one of before and after the processing. 2 . The method of manufacturing a semiconductor device according to claim 1 , wherein the processing includes at least one of: a step of forming a plurality of impurity regions in the semiconductor substrate; a step of forming a protective film on a first main surface of the semiconductor substrate; and a step of grinding a second main surface opposite to the first main surface of the semiconductor substrate after the protective film is formed. 3 . The method of manufacturing a semiconductor device according to claim 2 , wherein the protective film is a glass plate. 4 . The method of manufacturing a semiconductor device according to claim 2 , wherein the protective film is tape. 5 . The method of manufacturing a semiconductor device according to claim 1 , wherein the FOUP includes: a housing having an opening portion that opens toward a first direction and through which the semiconductor substrate is taken in and out; a partition portion connected to an inside of the housing and capable of partitioning and accommodating an outer peripheral portion of a plurality of the semiconductor substrates up to 25 arranged at an interval of 10 mm in a second direction orthogonal to the first direction; and a plurality of support points protruding from the partition portion in the second direction and capable of supporting each of the plurality of semiconductor substrates accommodated in the partition portion along the second direction, when viewed from the second direction, an angle formed by a direction from a center of the semiconductor substrate accommodated in the partition portion toward the support point closest to the opening portion among the plurality of support points and a third direction orthogonal to the first direction and the second direction is 13° or more and 46° or less, W−10 mm<W′<W holds for a diameter W′ of an effective region of the semiconductor substrate, and a distance in the third direction between support points capable of supporting the semiconductor substrate among the plurality of support points is larger than W×cos 46° mm and less than W×cos 13° mm. 6 . The method of manufacturing a semiconductor device according to claim 5 , wherein the partition portion includes a first partition portion and a second partition portion located on a side opposite to the opening portion with respect to the first partition portion, and the support point closest to the opening portion among the plurality of support points protrudes from the first partition portion, and the support point farthest from the opening portion among the plurality of support points protrudes from the second partition portion. 7 . The method of manufacturing a semiconductor device according to claim 5 , wherein an angle formed by the third direction and a direction from a center of the semiconductor substrate accommodated in the partition portion toward the support point farthest from the opening portion among the plurality of support points when viewed from the second direction is 13° or more and 46° or less. 8 . The method of manufacturing a semiconductor device according to claim 5 , wherein a support point closest to the opening portion among the plurality of support points is higher in the second direction than the support point farthest from the opening portion among the plurality of support points. 9 . The method of manufacturing a semiconductor device according to claim 5 , wherein a tip of a first set of the support points among the plurality of support points is higher than a tip of a second set of the support points further on an inner side than the first set of the support points among the plurality of support points when viewed from the first direction. 10 . The method of manufacturing a semiconductor device according to claim 5 , wherein the plurality of support points are in surface contact with the semiconductor substrate accommodated in the partition portion. 11 . The method of manufacturing a semiconductor device according to claim 5 , wherein the partition portion is replaceable.

Assignees

Inventors

Classifications

  • of electrically inactive species · CPC title

  • into Group IV semiconductors · CPC title

  • characterised by substrate supports · CPC title

  • characterised by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports · CPC title

  • Docking arrangements · CPC title

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Frequently asked questions

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What does patent US2025279303A1 cover?
A method of manufacturing a semiconductor device includes a step of performing processing and a step of transporting. In the step of performing processing, processing for forming a semiconductor element is performed on a semiconductor substrate made from silicon carbide and having a diameter W of 200 mm or more. In the step of transporting, at least one of before and after processing, a semicon…
Who is the assignee on this patent?
Mitsubishi Electric Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/1921. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 04 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).