Transparent display device and tiled display device including the same

Patent metadata

Field	Value
Publication number	US-2025255061-A1
Application number	US-202519189732-A
Country	US
Kind code	A1
Filing date	Apr 25, 2025
Priority date	Dec 21, 2020
Publication date	Aug 7, 2025
Grant date	—

Abstract

A transparent display device includes a substrate, a main light emitting diode, a main transmission region, a sub-light emitting diode, a sub-transmission region, and a driving circuit. The substrate includes a main display area and a peripheral area adjacent to the main display area. The main light emitting diode is disposed in the main display area. The main transmission region is disposed in the main display area and adjacent to the main light emitting diode. The sub-light emitting diode is disposed in the peripheral area. The sub-transmission region is disposed in the peripheral area and adjacent to the sub-light emitting diode. The driving circuit is disposed in the peripheral area and overlaps, in a plan view, the sub-light emitting diode.

First claim

What is claimed is:

1 . A tiled display device comprising:
a first display panel and a second display panel at least partially overlapped with each other in a plan view, wherein each of the first display panel and the second display panel comprises:
a substrate comprising a main display area and a peripheral area adjacent to the main display area;
a main light emitting diode disposed in the main display area;
a main transmission region disposed in the main display area and adjacent to the main light emitting diode;
a sub-light emitting diode disposed in the peripheral area;
a sub-transmission region disposed in the peripheral area and adjacent to the sub-light emitting diode; and
a driving circuit disposed in the peripheral area and overlapping, in the plan view, the sub-light emitting diode.

2 . The tiled display device of claim 1 , wherein, in the plan view, the peripheral area of the first display panel and the peripheral area of the second display panel overlap each other.

3 . The tiled display device of claim 2 , wherein:
a plurality of first sub-pixel groups are disposed in the peripheral area of the first display panel; each of the first sub-pixel groups comprises a sub-transmission region and a sub-light emitting diode; a plurality of second sub-pixel groups are disposed in the peripheral area of the second display panel; each of the second sub-pixel groups comprises a sub-transmission region and a sub-light emitting diode; and in the plan view, the first sub-pixel group and the second sub-pixel group overlap each other.

4 . The tiled display device of claim 3 , wherein:
in the plan view, a portion the sub-transmission region of the first display panel overlaps the sub-light emitting diode of the second display panel; and in the plan view, the sub-light emitting diode of the first display panel overlaps a portion of the sub-transmission region of the second display panel.

5 . The tiled display device of claim 4 , wherein, in the plan view, a portion of the sub-transmission region of the first display panel and a portion of the sub-transmission region of the second display panel overlap each other.

6 . The tiled display device of claim 5 , wherein, in the plan view, the sub-light emitting diodes of the first display panel and the sub-light emitting diodes of the second display panel do not overlap each other.

7 . The tiled display device of claim 6 , wherein:
the sub-light emitting diodes of the first display panel are disposed in an upper left region and an upper right region of the first sub-pixel group; the sub-light emitting diodes of the second display panel are disposed in a lower left region and a lower right region of the second sub-pixel group; and an overlapped portion of the sub-transmission region of the first display panel and the sub-transmission region of the second display panel are disposed in central regions of the first sub-pixel group and the second sub-pixel group.

8 . The tiled display device of claim 1 , wherein each of the first display panel and the second display panel comprises:
a main pixel circuit connected to the main light emitting diode, the main pixel circuit being disposed in the main display area; and a sub-pixel circuit connected to the sub-light emitting diode, the sub-pixel circuit being disposed in the peripheral area.

9 . The tiled display device of claim 8 , further comprising:
an extension line connecting the sub-pixel circuit and the sub-light emitting diode, wherein, in the plan view, the extension line does not overlap the sub-transmission region.

10 . The tiled display device of claim 9 , wherein:
the sub-light emitting diode comprises an anode, an emission layer, and a cathode sequentially stacked; and the extension line extends from the anode.

11 . The tiled display device of claim 8 , wherein:
in the plan view, the driving circuit does not overlap the sub-pixel circuit; and in the plan view, the sub-transmission region does not overlap the sub-light emitting diode, the driving circuit, and the sub-pixel circuit.

Assignees

• Samsung Display Co Ltd

Inventors

• Ko Yoo Min
• Kim Gun Hee
• Kim Hye Won
• Lee Sun Hee
• Jeon Joo Hee

Classifications

• H10W90/00

  Package configurations · CPC title

• H10H29/142 Primary

  Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title

• G09F9/3026

  Video wall, i.e. stackable semiconductor matrix display modules (video wall control systems G06F3/1446, G09G2300/026) · CPC title

• G09F9/33

  being semiconductor devices, e.g. diodes · CPC title

• G09G3/32

  semiconductive, e.g. using light-emitting diodes [LED] · CPC title