Through-substrate laser soldering with embedded absorbing layer

Patent metadata

Field	Value
Publication number	US-2025253281-A1
Application number	US-202418432609-A
Country	US
Kind code	A1
Filing date	Feb 5, 2024
Priority date	Feb 5, 2024
Publication date	Aug 7, 2025
Grant date	—

Abstract

Electronic assemblies with absorbing layers are described. In an embodiment, an electronic assembly includes an absorbing layer embedded in a substrate, a landing pad formed on a top surface of the substrate, and an electronic component bonded to the landing pad by a bonding layer, where the absorbing layer is located below the electronic component and absorbs a particular wavelength to a greater extent than the substrate.

First claim

What is claimed is:

1 . An electronic assembly comprising:
a substrate; an absorbing layer embedded in the substrate; a landing pad formed on a top surface of the substrate; and an electronic component bonded to the landing pad by a bonding layer; wherein the absorbing layer is located below the electronic component and absorbs a particular wavelength to a greater extent than the substrate.

2 . The electronic assembly of claim 1 , wherein the substrate comprises silicon.

3 . The electronic assembly of claim 1 , wherein the absorbing layer comprises silicon germanium.

4 . The electronic assembly of claim 1 , wherein the bonding layer comprises an electrically conductive material.

5 . The electronic assembly of claim 1 , wherein the absorbing layer is continuous.

6 . The electronic assembly of claim 1 , wherein the absorbing layer is patterned to approximate a shape of the electronic component.

7 . The electronic assembly of claim 1 , wherein a bottom surface of the substrate includes an anti-reflective coating.

8 . The electronic assembly of claim 1 , further comprising a lateral insulating layer located below the absorbing layer.

9 . The electronic assembly of claim 8 , further comprising insulating walls formed over the lateral insulating layer, wherein the insulating walls create a cell that laterally surrounds the absorbing layer.

10 . The electronic assembly of claim 1 , wherein the substrate includes a waveguide and a buried oxide layer, the waveguide being located over the buried oxide layer.

11 . The electronic assembly of claim 10 , wherein the substrate is structured so that a light path of the electronic component aligns with the waveguide.

12 . The electronic assembly of claim 11 , wherein the substrate includes a lateral insulating layer located below the absorbing layer.

13 . An array of electronic assemblies comprising:
a first electronic assembly including:
a substrate;
a first absorbing layer embedded in the substrate;
a first landing pad formed on a top surface of the substrate; and
a first electronic component bonded to the first landing pad by a first bonding layer;
wherein the first absorbing layer is located below the first electronic component and absorbs a first wavelength to a greater extent than the substrate; and
a second electronic assembly including:
a second absorbing layer embedding in the substrate;
a second landing pad formed on the top surface of the substrate; and
a second electronic component bonded to the second landing pad by a second bonding layer;
wherein the second absorbing layer is located below the second electronic component and absorbs a second wavelength to a greater extent than the substrate.

14 . The array of claim 13 , further comprising a lateral insulating layer located below the first and second absorbing layers, wherein the lateral insulating layer spans across a width of the substrate.

15 . The array of claim 14 , further comprising insulating walls formed over the lateral insulating layer, wherein the insulating walls create a first cell that laterally surrounds the first absorbing layer, and a second cell that laterally surrounds the second absorbing layer.

16 . The array of claim 13 , wherein the first absorbing layer and the second absorbing layer are located on a same plane.

17 . A method for embedding an absorbing layer in a substrate comprising:
forming the absorbing layer over a top surface of a base substrate; and forming an upper layer over the absorbing layer; wherein the absorbing layer absorbs a particular wavelength to a greater extent than the base substrate or the upper layer.

18 . The method of claim 17 , wherein the upper layer comprises silicon.

19 . The method of claim 17 , wherein the absorbing layer comprises silicon germanium.

20 . The method of claim 17 , further comprising forming a buried oxide layer over the upper layer, and a waveguide over the buried oxide layer.

Assignees

• Apple Inc

Inventors

• Witmer Jeremy D
• Hill Jeffrey T
• Wu Yipin

Classifications

• H10W90/732

  between stacked chips · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H01L2224/32145

  Electricity · mapped topic

• H01L25/105

  Electricity · mapped topic

• H01L24/32 Primary

  Electricity · mapped topic